| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/MCTargetDesc/ |
| H A D | ARMInstPrinter.cpp | 362 int32_t OffImm = (int32_t)MO1.getImm(); in printThumbLdrLabelOperand() local 363 bool isSub = OffImm < 0; in printThumbLdrLabelOperand() 366 if (OffImm == INT32_MIN) in printThumbLdrLabelOperand() 367 OffImm = 0; in printThumbLdrLabelOperand() 369 O << markup("<imm:") << "#-" << formatImm(-OffImm) << markup(">"); in printThumbLdrLabelOperand() 371 O << markup("<imm:") << "#" << formatImm(OffImm) << markup(">"); in printThumbLdrLabelOperand() 1045 int32_t OffImm = (int32_t)MO.getImm() << scale; in printAdrLabelOperand() local 1048 if (OffImm == INT32_MIN) in printAdrLabelOperand() 1050 else if (OffImm < 0) in printAdrLabelOperand() 1051 O << "#-" << -OffImm; in printAdrLabelOperand() [all …]
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelDAGToDAG.cpp | 80 bool SelectAddrModeIndexed7S8(SDValue N, SDValue &Base, SDValue &OffImm) { in SelectAddrModeIndexed7S8() argument 81 return SelectAddrModeIndexed7S(N, 1, Base, OffImm); in SelectAddrModeIndexed7S8() 83 bool SelectAddrModeIndexed7S16(SDValue N, SDValue &Base, SDValue &OffImm) { in SelectAddrModeIndexed7S16() argument 84 return SelectAddrModeIndexed7S(N, 2, Base, OffImm); in SelectAddrModeIndexed7S16() 86 bool SelectAddrModeIndexed7S32(SDValue N, SDValue &Base, SDValue &OffImm) { in SelectAddrModeIndexed7S32() argument 87 return SelectAddrModeIndexed7S(N, 4, Base, OffImm); in SelectAddrModeIndexed7S32() 89 bool SelectAddrModeIndexed7S64(SDValue N, SDValue &Base, SDValue &OffImm) { in SelectAddrModeIndexed7S64() argument 90 return SelectAddrModeIndexed7S(N, 8, Base, OffImm); in SelectAddrModeIndexed7S64() 92 bool SelectAddrModeIndexed7S128(SDValue N, SDValue &Base, SDValue &OffImm) { in SelectAddrModeIndexed7S128() argument 93 return SelectAddrModeIndexed7S(N, 16, Base, OffImm); in SelectAddrModeIndexed7S128() [all …]
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | ARMISelDAGToDAG.cpp | 106 bool SelectAddrModeImm12(SDValue N, SDValue &Base, SDValue &OffImm); 139 SDValue &OffImm); 141 SDValue &OffImm); 143 SDValue &OffImm); 145 SDValue &OffImm); 146 bool SelectThumbAddrModeSP(SDValue N, SDValue &Base, SDValue &OffImm); 148 bool SelectTAddrModeImm7(SDValue N, SDValue &Base, SDValue &OffImm); 151 bool SelectT2AddrModeImm12(SDValue N, SDValue &Base, SDValue &OffImm); 153 bool SelectT2AddrModeImm8(SDValue N, SDValue &Base, SDValue &OffImm); 155 SDValue &OffImm); [all …]
|
| H A D | ARMLoadStoreOptimizer.cpp | 1797 int OffImm = getMemoryOpOffset(*MI); in FixInvalidRegPairOp() local 1801 if (OddRegNum > EvenRegNum && OffImm == 0) { in FixInvalidRegPairOp() 1829 ? (isT2 ? (OffImm < 0 ? ARM::t2LDRi8 : ARM::t2LDRi12) : ARM::LDRi12) in FixInvalidRegPairOp() 1830 : (isT2 ? (OffImm < 0 ? ARM::t2STRi8 : ARM::t2STRi12) : ARM::STRi12); in FixInvalidRegPairOp() 1834 ? (isT2 ? (OffImm+4 < 0 ? ARM::t2LDRi8 : ARM::t2LDRi12) : ARM::LDRi12) in FixInvalidRegPairOp() 1835 : (isT2 ? (OffImm+4 < 0 ? ARM::t2STRi8 : ARM::t2STRi12) : ARM::STRi12); in FixInvalidRegPairOp() 1840 InsertLDR_STR(MBB, MBBI, OffImm + 4, isLd, NewOpc2, OddReg, OddDeadKill, in FixInvalidRegPairOp() 1842 InsertLDR_STR(MBB, MBBI, OffImm, isLd, NewOpc, EvenReg, EvenDeadKill, in FixInvalidRegPairOp() 1856 InsertLDR_STR(MBB, MBBI, OffImm, isLd, NewOpc, EvenReg, EvenDeadKill, in FixInvalidRegPairOp() 1859 InsertLDR_STR(MBB, MBBI, OffImm + 4, isLd, NewOpc2, OddReg, OddDeadKill, in FixInvalidRegPairOp() [all …]
|
| H A D | ARMBaseInstrInfo.cpp | 213 unsigned OffImm = MI.getOperand(NumOps - 2).getImm(); in convertToThreeAddress() local 218 bool isSub = ARM_AM::getAM2Op(OffImm) == ARM_AM::sub; in convertToThreeAddress() 219 unsigned Amt = ARM_AM::getAM2Offset(OffImm); in convertToThreeAddress() 232 ARM_AM::ShiftOpc ShOpc = ARM_AM::getAM2ShiftOpc(OffImm); in convertToThreeAddress() 252 bool isSub = ARM_AM::getAM3Op(OffImm) == ARM_AM::sub; in convertToThreeAddress() 253 unsigned Amt = ARM_AM::getAM3Offset(OffImm); in convertToThreeAddress()
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 5563 MachineOperand &OffImm = RootDef->getOperand(2); in selectAddrModeUnscaled() local 5564 if (!OffImm.isReg()) in selectAddrModeUnscaled() 5566 MachineInstr *RHS = MRI.getVRegDef(OffImm.getReg()); in selectAddrModeUnscaled()
|