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Searched refs:NumOps (Results 1 – 25 of 90) sorted by relevance

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/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/IR/
H A DUser.h73 User(Type *ty, unsigned vty, Use *, unsigned NumOps) in User() argument
75 assert(NumOps < (1u << NumUserOperandsBits) && "Too many operands"); in User()
76 NumUserOperands = NumOps; in User()
207 void setGlobalVariableNumOperands(unsigned NumOps) { in setGlobalVariableNumOperands() argument
208 assert(NumOps <= 1 && "GlobalVariable can only have 0 or 1 operands"); in setGlobalVariableNumOperands()
209 NumUserOperands = NumOps; in setGlobalVariableNumOperands()
215 void setNumHungOffUseOperands(unsigned NumOps) { in setNumHungOffUseOperands() argument
217 assert(NumOps < (1u << NumUserOperandsBits) && "Too many operands"); in setNumHungOffUseOperands()
218 NumUserOperands = NumOps; in setNumHungOffUseOperands()
H A DDerivedUser.h37 DerivedUser(Type *Ty, unsigned VK, Use *U, unsigned NumOps, in DerivedUser() argument
39 : User(Ty, VK, U, NumOps), DeleteValue(DeleteValue) {} in DerivedUser()
H A DConstant.h43 Constant(Type *ty, ValueTy vty, Use *Ops, unsigned NumOps) in Constant() argument
44 : User(ty, vty, Ops, NumOps) {} in Constant()
H A DGlobalObject.h44 GlobalObject(Type *Ty, ValueTy VTy, Use *Ops, unsigned NumOps,
47 : GlobalValue(Ty, VTy, Ops, NumOps, Linkage, Name, AddressSpace), in GlobalValue() argument
H A DInlineAsm.h272 static unsigned getFlagWord(unsigned Kind, unsigned NumOps) { in getFlagWord() argument
273 assert(((NumOps << 3) & ~0xffff) == 0 && "Too many inline asm operands!"); in getFlagWord()
275 return Kind | (NumOps << 3); in getFlagWord()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
H A DAMDGPURegisterBankInfo.h130 template <unsigned NumOps>
132 int8_t RegBanks[NumOps];
136 template <unsigned NumOps>
139 const std::array<unsigned, NumOps> RegSrcOpIdx,
140 ArrayRef<OpRegBankEntry<NumOps>> Table) const;
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/MCTargetDesc/
H A DMipsMCTargetDesc.cpp142 unsigned NumOps = Inst.getNumOperands(); in evaluateBranch() local
143 if (NumOps == 0) in evaluateBranch()
145 switch (Info->get(Inst.getOpcode()).OpInfo[NumOps - 1].OperandType) { in evaluateBranch()
151 Target = Region + Inst.getOperand(NumOps - 1).getImm(); in evaluateBranch()
156 Target = Addr + Inst.getOperand(NumOps - 1).getImm(); in evaluateBranch()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Transforms/Utils/
H A DAMDGPUEmitPrintf.cpp223 auto NumOps = Args.size(); in emitAMDGPUPrintfCall() local
224 assert(NumOps >= 1); in emitAMDGPUPrintfCall()
231 Desc = appendString(Builder, Desc, Fmt, NumOps == 1); in emitAMDGPUPrintfCall()
236 for (unsigned int i = 1; i != NumOps; ++i) { in emitAMDGPUPrintfCall()
237 bool IsLast = i == NumOps - 1; in emitAMDGPUPrintfCall()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/
H A DMachineRegisterInfo.cpp231 unsigned NumOps = MI->getNumOperands(); in verifyUseList() local
232 if (!(MO >= MO0 && MO < MO0+NumOps)) { in verifyUseList()
335 unsigned NumOps) { in moveOperands() argument
336 assert(Src != Dst && NumOps && "Noop moveOperands"); in moveOperands()
340 if (Dst >= Src && Dst < Src + NumOps) { in moveOperands()
342 Dst += NumOps - 1; in moveOperands()
343 Src += NumOps - 1; in moveOperands()
372 } while (--NumOps); in moveOperands()
H A DCallingConvLower.cpp133 unsigned NumOps = Outs.size(); in AnalyzeCallOperands() local
134 for (unsigned i = 0; i != NumOps; ++i) { in AnalyzeCallOperands()
151 unsigned NumOps = ArgVTs.size(); in AnalyzeCallOperands() local
152 for (unsigned i = 0; i != NumOps; ++i) { in AnalyzeCallOperands()
H A DMachineInstr.cpp124 if (unsigned NumOps = MCID->getNumOperands() + in MachineInstr() local
126 CapOperands = OperandCapacity::get(NumOps); in MachineInstr()
195 unsigned NumOps, MachineRegisterInfo *MRI) { in moveOperands() argument
197 return MRI->moveOperands(Dst, Src, NumOps); in moveOperands()
200 std::memmove(Dst, Src, NumOps * sizeof(MachineOperand)); in moveOperands()
820 unsigned NumOps; in findInlineAsmFlagIdx() local
822 i += NumOps) { in findInlineAsmFlagIdx()
827 NumOps = 1 + InlineAsm::getNumOperandRegisters(FlagMO.getImm()); in findInlineAsmFlagIdx()
828 if (i + NumOps > OpIdx) { in findInlineAsmFlagIdx()
1171 unsigned NumOps; in findTiedOperandIdx() local
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
H A DThumb2SizeReduction.cpp817 unsigned NumOps = MCID.getNumOperands(); in ReduceTo2Addr() local
818 HasCC = (MI->getOperand(NumOps-1).getReg() == ARM::CPSR); in ReduceTo2Addr()
819 if (HasCC && MI->getOperand(NumOps-1).isDead()) in ReduceTo2Addr()
839 unsigned NumOps = MCID.getNumOperands(); in ReduceTo2Addr() local
841 if (i < NumOps && MCID.OpInfo[i].isOptionalDef()) in ReduceTo2Addr()
909 unsigned NumOps = MCID.getNumOperands(); in ReduceToNarrow() local
910 HasCC = (MI->getOperand(NumOps-1).getReg() == ARM::CPSR); in ReduceToNarrow()
911 if (HasCC && MI->getOperand(NumOps-1).isDead()) in ReduceToNarrow()
946 unsigned NumOps = MCID.getNumOperands(); in ReduceToNarrow() local
948 if (i < NumOps && MCID.OpInfo[i].isOptionalDef()) in ReduceToNarrow()
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Sparc/
H A DSparcISelDAGToDAG.cpp160 unsigned NumOps = N->getNumOperands(); in tryInlineAsm() local
171 SDValue Glue = N->getGluedNode() ? N->getOperand(NumOps-1) in tryInlineAsm()
176 for(unsigned i = 0, e = N->getGluedNode() ? NumOps - 1 : NumOps; i < e; ++i) { in tryInlineAsm()
221 assert((i+2 < NumOps) && "Invalid number of operands in inline asm"); in tryInlineAsm()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
H A DScheduleDAGFast.cpp485 unsigned NumOps = Node->getNumOperands(); in DelayForLiveRegsBottomUp() local
486 if (Node->getOperand(NumOps-1).getValueType() == MVT::Glue) in DelayForLiveRegsBottomUp()
487 --NumOps; // Ignore the glue operand. in DelayForLiveRegsBottomUp()
489 for (unsigned i = InlineAsm::Op_FirstOperand; i != NumOps;) { in DelayForLiveRegsBottomUp()
673 unsigned NumOps = N->getNumOperands(); in ScheduleNode() local
674 if (unsigned NumLeft = NumOps) { in ScheduleNode()
680 if (NumLeft == NumOps && Op.getValueType() == MVT::Glue) { in ScheduleNode()
H A DInstrEmitter.cpp636 unsigned NumOps = Node->getNumOperands(); in EmitRegSequence() local
640 if (NumOps && Node->getOperand(NumOps-1).getValueType() == MVT::Other) in EmitRegSequence()
641 --NumOps; // Ignore chain if it exists. in EmitRegSequence()
643 assert((NumOps & 1) == 1 && in EmitRegSequence()
645 for (unsigned i = 1; i != NumOps; ++i) { in EmitRegSequence()
1173 unsigned NumOps = Node->getNumOperands(); in EmitSpecialNode() local
1174 if (Node->getOperand(NumOps-1).getValueType() == MVT::Glue) in EmitSpecialNode()
1175 --NumOps; // Ignore the glue operand. in EmitSpecialNode()
1203 for (unsigned i = InlineAsm::Op_FirstOperand; i != NumOps;) { in EmitSpecialNode()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/
H A DRISCVMCInstLower.cpp151 int NumOps = MI->getNumExplicitOperands(); in lowerRISCVVMachineInstrToMCInst() local
158 if (RISCVII::hasVLOp(TSFlags) && OpNo == (NumOps - 2)) in lowerRISCVVMachineInstrToMCInst()
160 if (RISCVII::hasSEWOp(TSFlags) && OpNo == (NumOps - 1)) in lowerRISCVVMachineInstrToMCInst()
/netbsd-src/external/apache2/llvm/dist/llvm/utils/TableGen/
H A DDAGISelMatcherEmitter.cpp488 unsigned NumOps = cast<CheckPredicateMatcher>(N)->getNumOperands(); in EmitMatcher() local
489 OS << "OPC_CheckPredicateWithOperands, " << NumOps << "/*#Ops*/, "; in EmitMatcher()
490 for (unsigned i = 0; i < NumOps; ++i) in EmitMatcher()
492 OperandBytes = 1 + NumOps; in EmitMatcher()
953 unsigned NumOps = P.getNumOperands(); in EmitPredicateFunctions() local
956 ++NumOps; // Get the chained node too. in EmitPredicateFunctions()
961 OS << " Result.resize(NextRes+" << NumOps << ");\n"; in EmitPredicateFunctions()
979 for (unsigned i = 0; i != NumOps; ++i) in EmitPredicateFunctions()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/MCTargetDesc/
H A DX86MCCodeEmitter.cpp884 unsigned NumOps = Desc.getNumOperands(); in emitVEXOpcodePrefix() local
1045 unsigned RcOperand = NumOps - 1; in emitVEXOpcodePrefix()
1219 unsigned NumOps = MI.getNumOperands(); in emitREXPrefix() local
1223 for (unsigned i = CurOp; i != NumOps; ++i) { in emitREXPrefix()
1420 unsigned NumOps = Desc.getNumOperands(); in encodeInstruction() local
1460 OpcodeOffset = MI.getOperand(NumOps - 1).getImm(); in encodeInstruction()
1462 --NumOps; // Drop the operand from the end. in encodeInstruction()
1553 --NumOps; in encodeInstruction()
1802 if (CurOp != NumOps) { in encodeInstruction()
1813 while (CurOp != NumOps && NumOps - CurOp <= 2) { in encodeInstruction()
[all …]
H A DX86BaseInfo.h1048 unsigned NumOps = Desc.getNumOperands(); in getOperandBias() local
1055 if (NumOps > 1 && Desc.getOperandConstraint(1, MCOI::TIED_TO) == 0) in getOperandBias()
1059 if (NumOps == 8 && in getOperandBias()
1065 if (NumOps >= 4 && Desc.getOperandConstraint(2, MCOI::TIED_TO) == 0 && in getOperandBias()
1070 if (NumOps == 9 && Desc.getOperandConstraint(2, MCOI::TIED_TO) == 0 && in getOperandBias()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/
H A DGISelKnownBits.cpp455 unsigned NumOps = MI.getNumOperands(); in computeKnownBitsImpl() local
458 for (unsigned I = 0; I != NumOps - 1; ++I) { in computeKnownBitsImpl()
469 unsigned NumOps = MI.getNumOperands(); in computeKnownBitsImpl() local
470 Register SrcReg = MI.getOperand(NumOps - 1).getReg(); in computeKnownBitsImpl()
479 for (; DstIdx != NumOps - 1 && MI.getOperand(DstIdx).getReg() != R; in computeKnownBitsImpl()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
H A DHexagonGenPredicate.cpp374 unsigned NumOps = MI->getNumOperands(); in convertToPredForm() local
375 for (unsigned i = 0; i < NumOps; ++i) { in convertToPredForm()
411 NumOps = 2; in convertToPredForm()
427 for (unsigned i = 1; i < NumOps; ++i) { in convertToPredForm()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/
H A DX86FloatingPoint.cpp1121 unsigned NumOps = MI.getDesc().getNumOperands(); in handleOneArgFP() local
1122 assert((NumOps == X86::AddrNumOperands + 1 || NumOps == 1) && in handleOneArgFP()
1126 unsigned Reg = getFPReg(MI.getOperand(NumOps - 1)); in handleOneArgFP()
1154 MI.RemoveOperand(NumOps - 1); // Remove explicit ST(0) operand in handleOneArgFP()
1182 unsigned NumOps = MI.getDesc().getNumOperands(); in handleOneArgFPRW() local
1183 assert(NumOps >= 2 && "FPRW instructions must have 2 ops!!"); in handleOneArgFPRW()
1530 unsigned NumOps = 0; in handleSpecialFP() local
1535 i != e && MI.getOperand(i).isImm(); i += 1 + NumOps) { in handleSpecialFP()
1538 NumOps = InlineAsm::getNumOperandRegisters(Flags); in handleSpecialFP()
1539 if (NumOps != 1) in handleSpecialFP()
H A DX86CallFrameOptimization.cpp563 unsigned NumOps = DefMov->getDesc().getNumOperands(); in adjustCallSequence() local
564 for (unsigned i = NumOps - X86::AddrNumOperands; i != NumOps; ++i) in adjustCallSequence()
/netbsd-src/sys/external/bsd/acpica/dist/debugger/
H A Ddbdisply.c427 UINT32 NumOps = 0; in AcpiDbDisplayMethodInfo() local
467 NumOps++; in AcpiDbDisplayMethodInfo()
510 NumOps, NumOperators, NumOperands); in AcpiDbDisplayMethodInfo()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/IR/
H A DInstruction.cpp24 Instruction::Instruction(Type *ty, unsigned it, Use *Ops, unsigned NumOps, in Instruction() argument
26 : User(ty, Value::InstructionVal + it, Ops, NumOps), Parent(nullptr) { in Instruction()
36 Instruction::Instruction(Type *ty, unsigned it, Use *Ops, unsigned NumOps, in Instruction() argument
38 : User(ty, Value::InstructionVal + it, Ops, NumOps), Parent(nullptr) { in Instruction()

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