Home
last modified time | relevance | path

Searched refs:NewVT (Results 1 – 24 of 24) sorted by relevance

/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeTypesGeneric.cpp219 EVT NewVT = TLI.getTypeToTransformTo(*DAG.getContext(), OldVT); in ExpandRes_EXTRACT_VECTOR_ELT() local
232 NewVT, 2*OldElts), in ExpandRes_EXTRACT_VECTOR_ELT()
239 Lo = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, NewVT, NewVec, Idx); in ExpandRes_EXTRACT_VECTOR_ELT()
243 Hi = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, NewVT, NewVec, Idx); in ExpandRes_EXTRACT_VECTOR_ELT()
376 EVT NewVT = TLI.getTypeToTransformTo(*DAG.getContext(), OldVT); in ExpandOp_BUILD_VECTOR() local
396 EVT NewVecVT = EVT::getVectorVT(*DAG.getContext(), NewVT, NewElts.size()); in ExpandOp_BUILD_VECTOR()
H A DLegalizeVectorTypes.cpp299 EVT NewVT = N->getValueType(0).getVectorElementType(); in ScalarizeVecRes_BITCAST() local
301 NewVT, Op); in ScalarizeVecRes_BITCAST()
1989 EVT NewVT = Inputs[0].getValueType(); in SplitVecRes_VECTOR_SHUFFLE() local
1990 unsigned NewElts = NewVT.getVectorNumElements(); in SplitVecRes_VECTOR_SHUFFLE()
2047 EVT EltVT = NewVT.getVectorElementType(); in SplitVecRes_VECTOR_SHUFFLE()
2074 Output = DAG.getBuildVector(NewVT, dl, SVOps); in SplitVecRes_VECTOR_SHUFFLE()
2077 Output = DAG.getUNDEF(NewVT); in SplitVecRes_VECTOR_SHUFFLE()
2082 DAG.getUNDEF(NewVT) : Inputs[InputUsed[1]]; in SplitVecRes_VECTOR_SHUFFLE()
2084 Output = DAG.getVectorShuffle(NewVT, dl, Op0, Op1, Ops); in SplitVecRes_VECTOR_SHUFFLE()
4774 EVT NewVT = EVT::getVectorVT(*DAG.getContext(), VT, NewNumElts); in WidenVecOp_BITCAST() local
[all …]
H A DDAGCombiner.cpp4472 EVT NewVT = EVT::getIntegerVT(*DAG.getContext(), SimpleSize*2); in visitMULHS() local
4473 if (TLI.isOperationLegal(ISD::MUL, NewVT)) { in visitMULHS()
4474 N0 = DAG.getNode(ISD::SIGN_EXTEND, DL, NewVT, N0); in visitMULHS()
4475 N1 = DAG.getNode(ISD::SIGN_EXTEND, DL, NewVT, N1); in visitMULHS()
4476 N1 = DAG.getNode(ISD::MUL, DL, NewVT, N0, N1); in visitMULHS()
4477 N1 = DAG.getNode(ISD::SRL, DL, NewVT, N1, in visitMULHS()
4529 EVT NewVT = EVT::getIntegerVT(*DAG.getContext(), SimpleSize*2); in visitMULHU() local
4530 if (TLI.isOperationLegal(ISD::MUL, NewVT)) { in visitMULHU()
4531 N0 = DAG.getNode(ISD::ZERO_EXTEND, DL, NewVT, N0); in visitMULHU()
4532 N1 = DAG.getNode(ISD::ZERO_EXTEND, DL, NewVT, N1); in visitMULHU()
[all …]
H A DTargetLowering.cpp238 EVT NewVT = VT; in findOptimalMemOpLowering() local
243 NewVT = (VT.getSizeInBits() > 64) ? MVT::i64 : MVT::i32; in findOptimalMemOpLowering()
244 if (isOperationLegalOrCustom(ISD::STORE, NewVT) && in findOptimalMemOpLowering()
245 isSafeMemOpType(NewVT.getSimpleVT())) in findOptimalMemOpLowering()
247 else if (NewVT == MVT::i64 && in findOptimalMemOpLowering()
251 NewVT = MVT::f64; in findOptimalMemOpLowering()
258 NewVT = (MVT::SimpleValueType)(NewVT.getSimpleVT().SimpleTy - 1); in findOptimalMemOpLowering()
259 if (NewVT == MVT::i8) in findOptimalMemOpLowering()
261 } while (!isSafeMemOpType(NewVT.getSimpleVT())); in findOptimalMemOpLowering()
263 NewVTSize = NewVT.getSizeInBits() / 8; in findOptimalMemOpLowering()
[all …]
H A DLegalizeDAG.cpp3018 EVT NewVT = in ExpandNode() local
3021 assert(NewVT.bitsEq(VT)); in ExpandNode()
3024 Op0 = DAG.getNode(ISD::BITCAST, dl, NewVT, Op0); in ExpandNode()
3025 Op1 = DAG.getNode(ISD::BITCAST, dl, NewVT, Op1); in ExpandNode()
3029 NewVT.getVectorNumElements()/VT.getVectorNumElements(); in ExpandNode()
3045 VT = NewVT; in ExpandNode()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/
H A DTargetLoweringBase.cpp1104 MVT NewVT = MVT::getVectorVT(EltTy, EC); in getVectorTypeBreakdownMVT() local
1105 if (!TLI->isTypeLegal(NewVT)) in getVectorTypeBreakdownMVT()
1106 NewVT = EltTy; in getVectorTypeBreakdownMVT()
1107 IntermediateVT = NewVT; in getVectorTypeBreakdownMVT()
1109 unsigned LaneSizeInBits = NewVT.getScalarSizeInBits(); in getVectorTypeBreakdownMVT()
1115 MVT DestVT = TLI->getRegisterType(NewVT); in getVectorTypeBreakdownMVT()
1117 if (EVT(DestVT).bitsLT(NewVT)) // Value is expanded, e.g. i64 -> i16. in getVectorTypeBreakdownMVT()
1574 EVT NewVT = EVT::getVectorVT(Context, EltTy, EltCnt); in getVectorTypeBreakdown() local
1575 if (!isTypeLegal(NewVT)) in getVectorTypeBreakdown()
1576 NewVT = EltTy; in getVectorTypeBreakdown()
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/
H A DCallLowering.cpp546 MVT NewVT = TLI->getRegisterTypeForCallingConv(Ctx, CallConv, CurVT); in determineAssignments() local
555 if (Assigner.assignArg(i, CurVT, NewVT, NewVT, CCValAssign::Full, Args[i], in determineAssignments()
590 (NumParts * NewVT.getSizeInBits() != CurVT.getSizeInBits())) { in determineAssignments()
596 if (Assigner.assignArg(i, CurVT, NewVT, NewVT, CCValAssign::Full, Args[i], in determineAssignments()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/GISel/
H A DAArch64CallLowering.cpp384 MVT NewVT = TLI.getRegisterTypeForCallingConv(Ctx, CC, SplitEVTs[i]); in lowerReturn() local
385 if (EVT(NewVT) != SplitEVTs[i]) { in lowerReturn()
394 LLT NewLLT(NewVT); in lowerReturn()
396 CurArgInfo.Ty = EVT(NewVT).getTypeForEVT(Ctx); in lowerReturn()
399 if (NewVT.isVector()) { in lowerReturn()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/BPF/
H A DBPFISelLowering.h129 EVT NewVT) const override { in shouldReduceLoadWidth() argument
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.h323 EVT NewVT) const override;
H A DHexagonISelLowering.cpp3538 ISD::LoadExtType ExtTy, EVT NewVT) const { in shouldReduceLoadWidth()
3540 if (!TargetLoweringBase::shouldReduceLoadWidth(Load, ExtTy, NewVT)) in shouldReduceLoadWidth()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelLowering.cpp722 EVT NewVT) const { in shouldReduceLoadWidth()
724 if (!TargetLoweringBase::shouldReduceLoadWidth(N, ExtTy, NewVT)) in shouldReduceLoadWidth()
727 unsigned NewSize = NewVT.getStoreSizeInBits(); in shouldReduceLoadWidth()
2907 EVT NewVT = getEquivalentMemType(*DAG.getContext(), VT); in performLoadCombine() local
2910 = DAG.getLoad(NewVT, SL, LN->getChain(), in performLoadCombine()
2958 EVT NewVT = getEquivalentMemType(*DAG.getContext(), VT); in performStoreCombine() local
2964 SDValue CastVal = DAG.getNode(ISD::BITCAST, SL, NewVT, Val); in performStoreCombine()
H A DR600ISelLowering.cpp1731 EVT NewVT = MVT::v4i32; in constBufferLoad() local
1734 NewVT = VT; in constBufferLoad()
1737 SDValue Result = DAG.getBuildVector(NewVT, DL, makeArrayRef(Slots, NumElements)); in constBufferLoad()
H A DSIISelLowering.cpp4853 EVT NewVT = getEquivalentMemType(*DAG.getContext(), VT); in ReplaceNodeResults() local
4854 SDValue LHS = DAG.getNode(ISD::BITCAST, SL, NewVT, N->getOperand(1)); in ReplaceNodeResults()
4855 SDValue RHS = DAG.getNode(ISD::BITCAST, SL, NewVT, N->getOperand(2)); in ReplaceNodeResults()
4857 EVT SelectVT = NewVT; in ReplaceNodeResults()
4858 if (NewVT.bitsLT(MVT::i32)) { in ReplaceNodeResults()
4867 if (NewVT != SelectVT) in ReplaceNodeResults()
4868 NewSelect = DAG.getNode(ISD::TRUNCATE, SL, NewVT, NewSelect); in ReplaceNodeResults()
6209 EVT NewVT = NumVDataDwords > 1 ? in lowerImage() local
6213 ResultTypes[0] = NewVT; in lowerImage()
10219 EVT NewVT = getEquivalentMemType(*DAG.getContext(), VecVT); in performExtractVectorEltCombine() local
[all …]
H A DAMDGPUISelDAGToDAG.cpp885 MVT NewVT = Opc == AMDGPUISD::CVT_PKRTZ_F16_F32 ? MVT::v2f16 : MVT::v2i16; in Select() local
886 N = CurDAG->MorphNodeTo(N, N->getOpcode(), CurDAG->getVTList(NewVT), in Select()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Transforms/InstCombine/
H A DInstCombineCalls.cpp1540 VectorType *NewVT = cast<VectorType>(II->getType()); in visitCallInst() local
1543 CV0 = ConstantExpr::getIntegerCast(CV0, NewVT, /*isSigned=*/!Zext); in visitCallInst()
1544 CV1 = ConstantExpr::getIntegerCast(CV1, NewVT, /*isSigned=*/!Zext); in visitCallInst()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/
H A DX86ISelLowering.h1279 EVT NewVT) const override;
H A DX86ISelLowering.cpp5238 EVT NewVT) const { in shouldReduceLoadWidth()
9418 MVT NewVT = V0_LO.getSimpleValueType(); in ExpandHorizontalBinOp() local
9420 SDValue LO = DAG.getUNDEF(NewVT); in ExpandHorizontalBinOp()
9421 SDValue HI = DAG.getUNDEF(NewVT); in ExpandHorizontalBinOp()
9426 LO = DAG.getNode(X86Opcode, DL, NewVT, V0_LO, V0_HI); in ExpandHorizontalBinOp()
9428 HI = DAG.getNode(X86Opcode, DL, NewVT, V1_LO, V1_HI); in ExpandHorizontalBinOp()
9432 LO = DAG.getNode(X86Opcode, DL, NewVT, V0_LO, V1_LO); in ExpandHorizontalBinOp()
9435 HI = DAG.getNode(X86Opcode, DL, NewVT, V0_HI, V1_HI); in ExpandHorizontalBinOp()
13377 MVT NewVT = V.getSimpleValueType(); in getScalarValueForVectorElement() local
13378 if (!NewVT.isVector() || NewVT.getScalarSizeInBits() != VT.getScalarSizeInBits()) in getScalarValueForVectorElement()
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.h569 EVT NewVT) const override;
H A DAArch64ISelLowering.cpp3257 MVT NewVT = MVT::getVectorVT(MVT::f32, NumElts); in LowerVectorFP_TO_INT() local
3261 DAG.getNode(ISD::FP_EXTEND, dl, NewVT, Op.getOperand(0))); in LowerVectorFP_TO_INT()
3510 EVT NewVT = getExtensionTo64Bits(OrigTy); in addRequiredExtensionForVectorMULL() local
3512 return DAG.getNode(ExtOpcode, SDLoc(N), NewVT, N); in addRequiredExtensionForVectorMULL()
10943 EVT NewVT) const { in shouldReduceLoadWidth()
10945 if (!TargetLoweringBase::shouldReduceLoadWidth(Load, ExtTy, NewVT)) in shouldReduceLoadWidth()
13256 MVT NewVT = MVT::getVectorVT(ElementTy, NumElems * 2); in tryExtendDUPToExtractHigh() local
13260 DAG.getNode(N->getOpcode(), dl, NewVT, N->ops()), in tryExtendDUPToExtractHigh()
/netbsd-src/external/apache2/llvm/dist/clang/lib/AST/
H A DDecl.cpp2581 auto *NewVT = VarTemplate->getInstantiatedFromMemberTemplate(); in getTemplateInstantiationPattern() local
2582 if (!NewVT) in getTemplateInstantiationPattern()
2584 VarTemplate = NewVT; in getTemplateInstantiationPattern()
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
H A DTargetLowering.h1527 EVT NewVT) const { in shouldReduceLoadWidth() argument
1530 if (NewVT.isVector() && !Load->hasOneUse()) in shouldReduceLoadWidth()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp8131 EVT NewVT = getVectorTyFromPredicateVector(VT); in PromoteMVEPredVector() local
8149 return DAG.getNode(ISD::BITCAST, dl, NewVT, PredAsVector); in PromoteMVEPredVector()
8180 EVT NewVT = PredAsVector.getValueType(); in LowerVECTOR_SHUFFLE_i1() local
8183 SDValue Shuffled = DAG.getVectorShuffle(NewVT, dl, PredAsVector, in LowerVECTOR_SHUFFLE_i1()
8184 DAG.getUNDEF(NewVT), ShuffleMask); in LowerVECTOR_SHUFFLE_i1()
8671 EVT NewVT = NewV.getValueType(); in LowerCONCAT_VECTORS_i1() local
8673 for (unsigned i = 0, e = NewVT.getVectorNumElements(); i < e; i++, j++) { in LowerCONCAT_VECTORS_i1()
8877 EVT NewVT = getExtensionTo64Bits(OrigTy); in AddRequiredExtensionForVMULL() local
8879 return DAG.getNode(ExtOpcode, SDLoc(N), NewVT, N); in AddRequiredExtensionForVMULL()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp13673 EVT NewVT = TargetVT == MVT::v2i64 ? MVT::v2f64 : MVT::v4f32; in combineElementTruncationToVectorTruncation() local
13674 SDValue BV = DAG.getBuildVector(NewVT, dl, Ops); in combineElementTruncationToVectorTruncation()