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Searched refs:NewDest (Results 1 – 10 of 10) sorted by relevance

/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
H A DThumb2InstrInfo.h36 MachineBasicBlock *NewDest) const override;
H A DThumb2InstrInfo.cpp63 MachineBasicBlock *NewDest) const { in ReplaceTailWithBranchTo()
67 TargetInstrInfo::ReplaceTailWithBranchTo(Tail, NewDest); in ReplaceTailWithBranchTo()
81 TargetInstrInfo::ReplaceTailWithBranchTo(Tail, NewDest); in ReplaceTailWithBranchTo()
H A DARMConstantIslandPass.cpp1723 MachineBasicBlock *NewDest = BMI->getOperand(0).getMBB(); in fixupConditionalBr() local
1724 if (BBUtils->isBBInRange(MI, NewDest, Br.MaxDisp)) { in fixupConditionalBr()
1729 MI->getOperand(0).setMBB(NewDest); in fixupConditionalBr()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/
H A DBranchFolding.h143 MachineBasicBlock &NewDest);
H A DTargetInstrInfo.cpp142 MachineBasicBlock *NewDest) const { in ReplaceTailWithBranchTo()
162 if (++MachineFunction::iterator(MBB) != MachineFunction::iterator(NewDest)) in ReplaceTailWithBranchTo()
163 insertBranch(*MBB, NewDest, nullptr, SmallVector<MachineOperand, 0>(), DL); in ReplaceTailWithBranchTo()
164 MBB->addSuccessor(NewDest); in ReplaceTailWithBranchTo()
H A DBranchFolding.cpp355 MachineBasicBlock &NewDest) { in replaceTailWithBranchTo() argument
371 for (MachineBasicBlock::RegisterMaskPair P : NewDest.liveins()) { in replaceTailWithBranchTo()
384 TII->ReplaceTailWithBranchTo(OldInst, &NewDest); in replaceTailWithBranchTo()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
H A DSIInstrInfo.cpp6212 Register NewDest = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass); in lowerScalarXnor() local
6216 BuildMI(MBB, MII, DL, get(AMDGPU::V_XNOR_B32_e64), NewDest) in lowerScalarXnor()
6220 MRI.replaceRegWith(Dest.getReg(), NewDest); in lowerScalarXnor()
6221 addUsersToMoveToVALUWorklist(NewDest, MRI, Worklist); in lowerScalarXnor()
6233 Register NewDest = MRI.createVirtualRegister(&AMDGPU::SReg_32RegClass); in lowerScalarXnor() local
6240 Xor = BuildMI(MBB, MII, DL, get(AMDGPU::S_XOR_B32), NewDest) in lowerScalarXnor()
6245 Xor = BuildMI(MBB, MII, DL, get(AMDGPU::S_XOR_B32), NewDest) in lowerScalarXnor()
6253 BuildMI(MBB, MII, DL, get(AMDGPU::S_NOT_B32), NewDest).addReg(Temp); in lowerScalarXnor()
6257 MRI.replaceRegWith(Dest.getReg(), NewDest); in lowerScalarXnor()
6261 addUsersToMoveToVALUWorklist(NewDest, MRI, Worklist); in lowerScalarXnor()
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/
H A DMipsConstantIslandPass.cpp1580 MachineBasicBlock *NewDest = in fixupConditionalBr() local
1582 if (isBBInRange(MI, NewDest, Br.MaxDisp)) { in fixupConditionalBr()
1588 MI->getOperand(TargetOperand).setMBB(NewDest); in fixupConditionalBr()
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
H A DTargetInstrInfo.h767 MachineBasicBlock *NewDest) const;
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/IR/
H A DInstructions.h4618 void setUnwindDest(BasicBlock *NewDest) {
4619 assert(NewDest);
4621 Op<1>() = NewDest;