Searched refs:Narrowed (Results 1 – 4 of 4) sorted by relevance
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUCodeGenPrepare.cpp | 1153 Value *Narrowed = nullptr; in shrinkDivRem64() local
1155 Narrowed = expandDivRem24Impl(Builder, I, Num, Den, NumDivBits, in shrinkDivRem64()
1158 Narrowed = expandDivRem32(Builder, I, Num, Den); in shrinkDivRem64()
1161 if (Narrowed) { in shrinkDivRem64()
1162 return IsSigned ? Builder.CreateSExt(Narrowed, Num->getType()) : in shrinkDivRem64()
1163 Builder.CreateZExt(Narrowed, Num->getType()); in shrinkDivRem64()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CombinerHelper.cpp | 2211 Register Narrowed = Unmerge.getReg(1); in applyCombineShiftToUnmerge() local
2219 Narrowed = Builder.buildLShr(HalfTy, Narrowed, in applyCombineShiftToUnmerge()
2224 Builder.buildMerge(DstReg, { Narrowed, Zero }); in applyCombineShiftToUnmerge()
2226 Register Narrowed = Unmerge.getReg(0); in applyCombineShiftToUnmerge() local
2232 Narrowed = Builder.buildShl(HalfTy, Narrowed, in applyCombineShiftToUnmerge()
2237 Builder.buildMerge(DstReg, { Zero, Narrowed }); in applyCombineShiftToUnmerge()
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| /netbsd-src/external/gpl3/gcc.old/dist/gcc/config/aarch64/ |
| H A D | iterators.md | 1206 ;; Narrowed modes for VDN.
1210 ;; Narrowed double-modes for VQN (Used for XTN).
1218 ;; Narrowed quad-modes for VQN (Used for XTN2).
1222 ;; Narrowed modes of vector modes.
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| /netbsd-src/external/gpl3/gcc/dist/gcc/config/aarch64/ |
| H A D | iterators.md | 1463 ;; Narrowed modes for VDN.
1469 ;; Narrowed double-modes for VQN (Used for XTN).
1477 ;; Narrowed quad-modes for VQN (Used for XTN2).
1481 ;; Narrowed modes of vector modes.
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