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Searched refs:MOP (Results 1 – 25 of 30) sorted by relevance

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/netbsd-src/external/gpl3/binutils.old/dist/include/opcode/
H A Darc.h482 #define INSN3OP(MOP,SOP) (((MOP & 0x1F) << 27) | ((SOP & 0x3F) << 16)) argument
483 #define INSN2OPX(MOP,SOP1,SOP2) (INSN3OP (MOP,SOP1) | (SOP2 & 0x3F)) argument
484 #define INSN2OP(MOP,SOP) (INSN2OPX (MOP,0x2F,SOP)) argument
486 #define INSN3OP_ABC(MOP,SOP) (INSN3OP (MOP,SOP)) argument
487 #define INSN3OP_ALC(MOP,SOP) (INSN3OP (MOP,SOP) | FIELDB (62)) argument
488 #define INSN3OP_ABL(MOP,SOP) (INSN3OP (MOP,SOP) | FIELDC (62)) argument
489 #define INSN3OP_ALL(MOP,SOP) (INSN3OP (MOP,SOP) | FIELDB (62) | FIELDC (62)) argument
490 #define INSN3OP_0BC(MOP,SOP) (INSN3OP (MOP,SOP) | FIELDA (62)) argument
491 #define INSN3OP_0LC(MOP,SOP) (INSN3OP (MOP,SOP) | FIELDA (62) | FIELDB (62)) argument
492 #define INSN3OP_0BL(MOP,SOP) (INSN3OP (MOP,SOP) | FIELDA (62) | FIELDC (62)) argument
[all …]
/netbsd-src/external/gpl3/binutils/dist/include/opcode/
H A Darc.h482 #define INSN3OP(MOP,SOP) (((MOP & 0x1F) << 27) | ((SOP & 0x3F) << 16)) argument
483 #define INSN2OPX(MOP,SOP1,SOP2) (INSN3OP (MOP,SOP1) | (SOP2 & 0x3F)) argument
484 #define INSN2OP(MOP,SOP) (INSN2OPX (MOP,0x2F,SOP)) argument
486 #define INSN3OP_ABC(MOP,SOP) (INSN3OP (MOP,SOP)) argument
487 #define INSN3OP_ALC(MOP,SOP) (INSN3OP (MOP,SOP) | FIELDB (62)) argument
488 #define INSN3OP_ABL(MOP,SOP) (INSN3OP (MOP,SOP) | FIELDC (62)) argument
489 #define INSN3OP_ALL(MOP,SOP) (INSN3OP (MOP,SOP) | FIELDB (62) | FIELDC (62)) argument
490 #define INSN3OP_0BC(MOP,SOP) (INSN3OP (MOP,SOP) | FIELDA (62)) argument
491 #define INSN3OP_0LC(MOP,SOP) (INSN3OP (MOP,SOP) | FIELDA (62) | FIELDB (62)) argument
492 #define INSN3OP_0BL(MOP,SOP) (INSN3OP (MOP,SOP) | FIELDA (62) | FIELDC (62)) argument
[all …]
/netbsd-src/external/gpl3/binutils.old/dist/opcodes/
H A Darc-ext-tbl.h58 #define EXTINSN2OPF(NAME, CPU, CLASS, SCLASS, MOP, SOP, FL) \ argument
59 { NAME, INSN2OP_BC (MOP,SOP), MINSN2OP_BC, CPU, CLASS, SCLASS, \
61 { NAME, INSN2OP_0C (MOP,SOP), MINSN2OP_0C, CPU, CLASS, SCLASS, \
63 { NAME, INSN2OP_BU (MOP,SOP), MINSN2OP_BU, CPU, CLASS, SCLASS, \
65 { NAME, INSN2OP_0U (MOP,SOP), MINSN2OP_0U, CPU, CLASS, SCLASS, \
67 { NAME, INSN2OP_BL (MOP,SOP), MINSN2OP_BL, CPU, CLASS, SCLASS, \
69 { NAME, INSN2OP_0L (MOP,SOP), MINSN2OP_0L, CPU, CLASS, SCLASS, \
72 #define EXTINSN2OP(NAME, CPU, CLASS, SCLASS, MOP, SOP) \ argument
73 EXTINSN2OPF(NAME, CPU, CLASS, SCLASS, MOP, SOP, FLAGS_F)
76 #define EXTINSN3OP(NAME, CPU, CLASS, SCLASS, MOP, SOP) \ argument
[all …]
/netbsd-src/external/gpl3/binutils/dist/opcodes/
H A Darc-ext-tbl.h58 #define EXTINSN2OPF(NAME, CPU, CLASS, SCLASS, MOP, SOP, FL) \ argument
59 { NAME, INSN2OP_BC (MOP,SOP), MINSN2OP_BC, CPU, CLASS, SCLASS, \
61 { NAME, INSN2OP_0C (MOP,SOP), MINSN2OP_0C, CPU, CLASS, SCLASS, \
63 { NAME, INSN2OP_BU (MOP,SOP), MINSN2OP_BU, CPU, CLASS, SCLASS, \
65 { NAME, INSN2OP_0U (MOP,SOP), MINSN2OP_0U, CPU, CLASS, SCLASS, \
67 { NAME, INSN2OP_BL (MOP,SOP), MINSN2OP_BL, CPU, CLASS, SCLASS, \
69 { NAME, INSN2OP_0L (MOP,SOP), MINSN2OP_0L, CPU, CLASS, SCLASS, \
72 #define EXTINSN2OP(NAME, CPU, CLASS, SCLASS, MOP, SOP) \ argument
73 EXTINSN2OPF(NAME, CPU, CLASS, SCLASS, MOP, SOP, FLAGS_F)
76 #define EXTINSN3OP(NAME, CPU, CLASS, SCLASS, MOP, SOP) \ argument
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/
H A DLiveRegUnits.cpp42 for (const MachineOperand &MOP : phys_regs_and_masks(MI)) { in stepBackward() local
43 if (MOP.isRegMask()) { in stepBackward()
44 removeRegsNotPreserved(MOP.getRegMask()); in stepBackward()
48 if (MOP.isDef()) in stepBackward()
49 removeReg(MOP.getReg()); in stepBackward()
53 for (const MachineOperand &MOP : phys_regs_and_masks(MI)) { in stepBackward() local
54 if (!MOP.isReg() || !MOP.readsReg()) in stepBackward()
56 addReg(MOP.getReg()); in stepBackward()
62 for (const MachineOperand &MOP : phys_regs_and_masks(MI)) { in accumulate() local
63 if (MOP.isRegMask()) { in accumulate()
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H A DLivePhysRegs.cpp46 for (const MachineOperand &MOP : phys_regs_and_masks(MI)) { in removeDefs() local
47 if (MOP.isRegMask()) { in removeDefs()
48 removeRegsInMask(MOP); in removeDefs()
52 if (MOP.isDef()) in removeDefs()
53 removeReg(MOP.getReg()); in removeDefs()
59 for (const MachineOperand &MOP : phys_regs_and_masks(MI)) { in addUses() local
60 if (!MOP.isReg() || !MOP.readsReg()) in addUses()
62 addReg(MOP.getReg()); in addUses()
H A DMachineOutliner.cpp801 for (MachineOperand &MOP : MI->operands()) { in outline()
803 if (!MOP.isReg()) in outline()
806 if (MOP.isDef()) { in outline()
808 DefRegs.insert(MOP.getReg()); in outline()
809 if (!MOP.isDead() && UseRegs.count(MOP.getReg())) in outline()
812 UseRegs.erase(MOP.getReg()); in outline()
813 } else if (!MOP.isUndef()) { in outline()
816 UseRegs.insert(MOP.getReg()); in outline()
H A DMachineCSE.cpp301 for (const auto &MOP : llvm::enumerate(MI->operands())) { in hasLivePhysRegDefUses() local
302 const MachineOperand &MO = MOP.value(); in hasLivePhysRegDefUses()
317 PhysDefs.push_back(std::make_pair(MOP.index(), Reg)); in hasLivePhysRegDefUses()
H A DLiveIntervals.cpp1115 for (MachineOperand &MOP : mi_bundle_ops(*KillMI)) in handleMoveDown()
1116 if (MOP.isReg() && MOP.isUse()) in handleMoveDown()
1117 MOP.setIsKill(false); in handleMoveDown()
H A DMachineVerifier.cpp2243 for (const MachineOperand &MOP : MI->uses()) { in checkLiveness() local
2244 if (!MOP.isReg() || !MOP.isImplicit()) in checkLiveness()
2247 if (!Register::isPhysicalRegister(MOP.getReg())) in checkLiveness()
2250 if (llvm::is_contained(TRI->subregs(MOP.getReg()), Reg)) in checkLiveness()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
H A DAArch64LoadStoreOptimizer.cpp822 bool isDef = any_of(I.operands(), [DefReg, TRI](MachineOperand &MOP) { in forAllMIsUntilDef() argument
823 return MOP.isReg() && MOP.isDef() && !MOP.isDebug() && MOP.getReg() && in forAllMIsUntilDef()
824 TRI->regsOverlap(MOP.getReg(), DefReg); in forAllMIsUntilDef()
837 for (const MachineOperand &MOP : phys_regs_and_masks(MI)) in updateDefinedRegisters() local
838 if (MOP.isReg() && MOP.isKill()) in updateDefinedRegisters()
839 Units.removeReg(MOP.getReg()); in updateDefinedRegisters()
841 for (const MachineOperand &MOP : phys_regs_and_masks(MI)) in updateDefinedRegisters() local
842 if (MOP.isReg() && !MOP.isKill()) in updateDefinedRegisters()
843 Units.addReg(MOP.getReg()); in updateDefinedRegisters()
887 for (auto &MOP : MI.operands()) { in mergePairedInsns() local
[all …]
H A DAArch64ExpandPseudoInsts.cpp678 auto MOP = MI.getOperand(RegMaskStartIdx); in expandCALL_RVMARKER() local
679 assert(MOP.isReg() && "can only add register operands"); in expandCALL_RVMARKER()
681 MOP.getReg(), /*Def=*/false, /*Implicit=*/true)); in expandCALL_RVMARKER()
H A DAArch64InstrInfo.cpp6984 for (const MachineOperand &MOP : MI.operands()) { in getOutliningType() local
6985 if (MOP.isCPI() || MOP.isJTI() || MOP.isCFIIndex() || MOP.isFI() || in getOutliningType()
6986 MOP.isTargetIndex()) in getOutliningType()
6990 if (MOP.isReg() && !MOP.isImplicit() && in getOutliningType()
6991 (MOP.getReg() == AArch64::LR || MOP.getReg() == AArch64::W30)) in getOutliningType()
7018 for (const MachineOperand &MOP : MI.operands()) { in getOutliningType() local
7019 if (MOP.isGlobal()) { in getOutliningType()
7020 Callee = dyn_cast<Function>(MOP.getGlobal()); in getOutliningType()
/netbsd-src/sys/arch/i386/i386/
H A Dcpu_in_cksum.S93 #define MOP \ macro
178 MOP
186 MOP
195 MOP
204 MOP
244 MOP
263 MOP
278 MOP
287 MOP
295 MOP
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/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
H A DLiveRegUnits.h168 [](const MachineOperand &MOP) { in phys_regs_and_masks()
169 return MOP.isRegMask() || (MOP.isReg() && !MOP.isDebug() && in phys_regs_and_masks()
170 Register::isPhysicalRegister(MOP.getReg())); in phys_regs_and_masks()
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/GlobalISel/
H A DCombinerHelper.h398 bool matchConstantOp(const MachineOperand &MOP, int64_t C);
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
H A DARMBaseInstrInfo.cpp6153 for (const MachineOperand &MOP : MI.operands()) { in getOutliningType() local
6154 if (MOP.isCPI() || MOP.isJTI() || MOP.isCFIIndex() || MOP.isFI() || in getOutliningType()
6155 MOP.isTargetIndex()) in getOutliningType()
6167 for (const MachineOperand &MOP : MI.operands()) { in getOutliningType() local
6168 if (MOP.isGlobal()) { in getOutliningType()
6169 Callee = dyn_cast<Function>(MOP.getGlobal()); in getOutliningType()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/VE/
H A DVEInstrInfo.td2099 class cmovrm<Instruction INSN, SDNodeXForm MOP = MIMM> :
2101 (INSN $cond, $comp, (MOP $t), $f)>;
2109 class cmov32rm<Instruction INSN, SubRegIndex sub_oty, SDNodeXForm MOP = MIMM> :
2113 (MOP $t),
/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/
H A DCombinerHelper.cpp2687 bool CombinerHelper::matchConstantOp(const MachineOperand &MOP, int64_t C) { in matchConstantOp() argument
2688 if (!MOP.isReg()) in matchConstantOp()
2691 auto ValAndVReg = getConstantVRegValWithLookThrough(MOP.getReg(), MRI); in matchConstantOp()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/
H A DX86InstrInfo.cpp9033 for (const MachineOperand &MOP : MI.operands()) in getOutliningType() local
9034 if (MOP.isCPI() || MOP.isJTI() || MOP.isCFIIndex() || MOP.isFI() || in getOutliningType()
9035 MOP.isTargetIndex()) in getOutliningType()
/netbsd-src/tests/usr.bin/netpgpverify/
H A Dt_netpgpverify.sh3097 zKWhyfMzglqZS1JUGAbsZract/LzGqZykbqZLtFfsM2qIhHsLZXbG2dOdgj9+MOP
/netbsd-src/sys/dev/usb/
H A Dusbdevs1829 product HOLTEK MOP35 0x0499 MOP-35
/netbsd-src/share/misc/
H A Dairport4891 MOP:Mount Pleasant Municipal Airport, MI, USA
/netbsd-src/external/bsd/openldap/dist/libraries/liblunicode/
H A DUnicodeData.txt9138 A0C0;YI SYLLABLE MOP;Lo;0;L;;;;;N;;;;;
10123 A49C;YI RADICAL MOP;So;0;ON;;;;;N;;;;;
/netbsd-src/crypto/external/bsd/heimdal/dist/lib/wind/
H A DUnicodeData.txt9587 A0C0;YI SYLLABLE MOP;Lo;0;L;;;;;N;;;;;
10572 A49C;YI RADICAL MOP;So;0;ON;;;;;N;;;;;

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