Searched refs:MEMSWCTL (Results 1 – 4 of 4) sorted by relevance
| /netbsd-src/sys/external/bsd/drm2/dist/drm/i915/gt/ |
| H A D | intel_rps.c | 318 rgvswctl = intel_uncore_read16(uncore, MEMSWCTL); in gen5_rps_set()
332 intel_uncore_write16(uncore, MEMSWCTL, rgvswctl); in gen5_rps_set()
333 intel_uncore_posting_read16(uncore, MEMSWCTL); in gen5_rps_set()
336 intel_uncore_write16(uncore, MEMSWCTL, rgvswctl); in gen5_rps_set()
462 if (wait_for_atomic((intel_uncore_read(uncore, MEMSWCTL) & in gen5_rps_enable()
491 rgvswctl = intel_uncore_read16(uncore, MEMSWCTL); in gen5_rps_disable()
508 intel_uncore_write(uncore, MEMSWCTL, rgvswctl); in gen5_rps_disable()
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| H A D | debugfs_gt_pm.c | 257 u16 rgvswctl = intel_uncore_read16(uncore, MEMSWCTL); in frequency_show()
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/i915/ |
| H A D | i915_debugfs.c | 800 u16 rgvswctl = intel_uncore_read16(uncore, MEMSWCTL); in i915_frequency_info()
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| H A D | i915_reg.h | 3816 #define MEMSWCTL _MMIO(0x11170) /* Ironlake only */ macro
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