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Searched refs:M2 (Results 1 – 25 of 192) sorted by relevance

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/netbsd-src/external/gpl3/gdb/dist/sim/testsuite/bfin/
H A Dc_regmv_imlb_imlb.s34 M2 = M2; define
42 M1 = M2;
43 M2 = M3; define
52 R6 = M2;
68 M0 = M2;
70 M2 = M0; define
79 R6 = M2;
97 M2 = M1; define
98 M3 = M2;
106 R6 = M2;
[all …]
H A Dc_regmv_imlb_dep_nostall.s29 M2 = SP; define
30 R6 = M2;
43 R1 = M2;
129 M2 = SP; define
130 B2 = M2;
151 R1 = M2;
188 M2 = B2; define
194 R2 = M2;
237 M2 = I2; define
238 R6 = M2;
[all …]
H A Dc_dspldst_ld_dr_ippm.s12 M2 = 0x0 (X); define
22 R2 = [ I2 ++ M2 ];
25 R5 = [ I1 ++ M2 ];
36 R1 = [ I0 ++ M2 ];
43 R0 = [ I3 ++ M2 ];
55 M2 = 0x4 (X); define
59 R4 = [ I2 ++ M2 ];
62 R7 = [ I1 ++ M2 ];
74 R3 = [ I0 ++ M2 ];
81 R2 = [ I3 ++ M2 ];
[all …]
H A Dc_regmv_pr_imlb.s24 M2 = P1; define
32 R6 = M2;
50 M2 = P2; define
58 R6 = M2;
76 M2 = P3; define
84 R6 = M2;
102 M2 = P4; define
110 R6 = M2;
128 M2 = P5; define
136 R6 = M2;
[all …]
H A Dc_dspldst_st_dr_ippm.s19 M2 = 0x4 (X); define
29 [ I2 ++ M2 ] = R2;
32 [ I1 ++ M2 ] = R2;
36 [ I0 ++ M2 ] = R3;
43 [ I3 ++ M2 ] = R7;
52 R2 = [ I2 ++ M2 ];
55 R5 = [ I1 ++ M2 ];
66 R0 = [ I0 ++ M2 ];
73 R7 = [ I3 ++ M2 ];
H A Dc_ldimmhalf_lzhi_ibml.s126 M2 = 0x300d (Z); define
127 M2.H = 0x300c;
137 R6 = M2;
161 M2 = 0x6660 (Z); define
162 M2.H = 0x6000;
171 R6 = M2;
194 M2 = 0xfff0 (Z); define
195 M2.H = 0xf000;
204 R6 = M2;
H A Dc_dagmodim_lz_inc_dec.s23 I2 += M2;
30 I1 += M2;
47 I0 -= M2;
56 I1 -= M2;
75 I3 += M2 (BREV);
80 I0 += M2 (BREV);
H A Dc_regmv_dr_imlb.s23 M2 = R0; define
32 R6 = M2;
57 M2 = R1; define
65 R6 = M2;
90 M2 = R2; define
98 R6 = M2;
123 M2 = R3; define
131 R6 = M2;
156 M2 = R4; define
164 R6 = M2;
[all …]
H A Dc_dagmodim_lnz_imltbl.s33 I2 += M2;
40 I1 += M2;
57 I0 -= M2;
66 I1 -= M2;
85 I3 += M2 (BREV);
90 I0 += M2 (BREV);
H A Dc_dagmodim_lnz_imgebl.s33 I2 += M2;
40 I1 += M2;
57 I0 -= M2;
66 I1 -= M2;
85 I3 += M2 (BREV);
90 I0 += M2 (BREV);
H A Dc_regmv_imlb_dep_stall.s29 M2 = R6; define
30 R5 = M2;
44 R1 = M2;
73 M2 = R2; define
74 P2 = M2;
96 R2 = M2;
236 M2 = R6; define
237 B2 = M2;
259 R1 = M2;
297 M2 = B2; define
[all …]
H A Dc_ldimmhalf_h_ibml.s95 M2.H = 0x300c;
104 R6 = M2;
121 M2.H = 0x6660;
129 R6 = M2;
146 M2.H = 0xfff0;
154 R6 = M2;
H A Dc_ldimmhalf_lz_ibml.s96 M2 = 0x300d (Z); define
105 R6 = M2;
123 M2 = 0x6660 (Z); define
131 R6 = M2;
148 M2 = 0xfff0 (Z); define
156 R6 = M2;
H A Dc_ldimmhalf_l_ibml.s95 M2.L = 0x300d;
104 R6 = M2;
121 M2.L = 0x6660;
129 R6 = M2;
146 M2.L = 0xfff0;
154 R6 = M2;
H A Dc_regmv_imlb_dr.s131 R0 = M2;
132 R1 = M2;
133 R2 = M2;
134 R3 = M2;
152 R4 = M2;
153 R5 = M2;
154 R6 = M2;
155 R7 = M2;
/netbsd-src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/subdev/clk/
H A Dnouveau_nvkm_subdev_clk_pllnv04.c156 int M1, N1, M2, N2, log2P; in getMNP_double() local
182 for (M2 = minM2; M2 <= maxM2; M2++) { in getMNP_double()
183 if (calcclk1/M2 < minU2) in getMNP_double()
185 if (calcclk1/M2 > maxU2) in getMNP_double()
189 N2 = (clkP * M2 + calcclk1/2) / calcclk1; in getMNP_double()
197 if (N2/M2 < 4 || N2/M2 > 10) in getMNP_double()
200 calcclk2 = calcclk1 * N2 / M2; in getMNP_double()
219 *pM2 = M2; in getMNP_double()
233 int *N1, int *M1, int *N2, int *M2, int *P) in nv04_pll_calc() argument
241 *M2 = 1; in nv04_pll_calc()
[all …]
H A Dnouveau_nvkm_subdev_clk_nv40.c67 int M2 = (coef & 0x00ff0000) >> 16; in read_pll_2() local
76 if (M2) in read_pll_2()
77 khz = khz * N2 / M2; in read_pll_2()
130 int *N1, int *M1, int *N2, int *M2, int *log2P) in nv40_clk_calc_pll() argument
143 ret = nv04_pll_calc(subdev, &pll, khz, N1, M1, N2, M2, log2P); in nv40_clk_calc_pll()
156 int N1, M1, N2, M2, log2P; in nv40_clk_calc() local
161 &N1, &M1, &N2, &M2, &log2P); in nv40_clk_calc()
165 if (N2 == M2) { in nv40_clk_calc()
170 clk->npll_coef = (N2 << 24) | (M2 << 16) | (N1 << 8) | M1; in nv40_clk_calc()
H A Dnouveau_nvkm_subdev_clk_nv04.c40 int N1, M1, N2, M2, P; in nv04_clk_pll_calc() local
41 int ret = nv04_pll_calc(&clock->subdev, info, clk, &N1, &M1, &N2, &M2, &P); in nv04_clk_pll_calc()
47 pv->M2 = M2; in nv04_clk_pll_calc()
/netbsd-src/external/lgpl3/gmp/dist/
H A Dprimesieve.c100 #define SET_OFF1(m1, m2, M1, M2, off, BITS) \ argument
103 m1 = (M1 >> off) | (M2 << (GMP_LIMB_BITS - off)); \
106 | M2 >> off; \
113 | M2 >> (off - GMP_LIMB_BITS); \
114 m2 = M2 << (BITS - off) \
118 m1 = M1; m2 = M2; \
121 #define SET_OFF2(m1, m2, m3, M1, M2, M3, off, BITS) \ argument
124 m1 = M2 << (GMP_LIMB_BITS - off); \
128 m2 |= (M2 >> off); \
138 m1 = M2 >> (off - GMP_LIMB_BITS) \
[all …]
/netbsd-src/external/gpl3/gcc.old/dist/libgcc/config/avr/libf7/
H A Dlibf7-constdef.h29 #define F7_CONST_DEF(NAME, FLAGS, M6, M5, M4, M3, M2, M1, M0, EXPO) \ argument
32 { .flags = FLAGS, .mant = { M0, M1, M2, M3, M4, M5, M6 }, .expo = EXPO };
36 #define F7_CONST_DEF(NAME, FLAGS, M6, M5, M4, M3, M2, M1, M0, EXPO) \ argument
38 { .flags = FLAGS, .mant = { M0, M1, M2, M3, M4, M5, M6 }, .expo = EXPO };
/netbsd-src/external/gpl3/gcc/dist/libgcc/config/avr/libf7/
H A Dlibf7-constdef.h29 #define F7_CONST_DEF(NAME, FLAGS, M6, M5, M4, M3, M2, M1, M0, EXPO) \ argument
32 { .flags = FLAGS, .mant = { M0, M1, M2, M3, M4, M5, M6 }, .expo = EXPO };
36 #define F7_CONST_DEF(NAME, FLAGS, M6, M5, M4, M3, M2, M1, M0, EXPO) \ argument
38 { .flags = FLAGS, .mant = { M0, M1, M2, M3, M4, M5, M6 }, .expo = EXPO };
/netbsd-src/external/gpl2/gmake/dist/tests/scripts/variables/
H A DMAKEFILES9 print MAKEFILE 'all: ; @echo DEFAULT RULE: M2=$(M2) M3=$(M3)', "\n";
15 M2 = m2
31 $answer = "DEFAULT RULE: M2=m2 M3=m3\n";
/netbsd-src/external/gpl3/binutils/dist/opcodes/
H A Dia64-opc-m.c26 #define M2 IA64_TYPE_M, 2 macro
208 {"ld16", M2, OpMXX6aHint (4, 0, 1, 0x28, 0), {R1, AR_CSD, MR3}, EMPTY},
210 {"ld16.nt1", M2, OpMXX6aHint (4, 0, 1, 0x28, 1), {R1, AR_CSD, MR3}, EMPTY},
212 {"ld16.nta", M2, OpMXX6aHint (4, 0, 1, 0x28, 3), {R1, AR_CSD, MR3}, EMPTY},
274 {"ld16.acq", M2, OpMXX6aHint (4, 0, 1, 0x2c, 0), {R1, AR_CSD, MR3}, EMPTY},
276 {"ld16.acq.nt1", M2, OpMXX6aHint (4, 0, 1, 0x2c, 1), {R1, AR_CSD, MR3}, EMPTY},
278 {"ld16.acq.nta", M2, OpMXX6aHint (4, 0, 1, 0x2c, 3), {R1, AR_CSD, MR3}, EMPTY},
730 {"ld16", M2, OpMXX6aHintHlfa (4, 0, 1, 0x28, 0, 0), {R1, AR_CSD, MR3}, EMPTY},
732 {"ld16.nt1", M2, OpMXX6aHintHlfa (4, 0, 1, 0x28, 1, 0), {R1, AR_CSD, MR3}, EMPTY},
733 {"ld16.d1", M2, OpMXX6aHintHlfa (4, 0, 1, 0x28, 1, 0), {R1, AR_CSD, MR3}, PSEUDO, 0, NULL},
[all …]
/netbsd-src/external/gpl3/binutils.old/dist/opcodes/
H A Dia64-opc-m.c26 #define M2 IA64_TYPE_M, 2 macro
208 {"ld16", M2, OpMXX6aHint (4, 0, 1, 0x28, 0), {R1, AR_CSD, MR3}, EMPTY},
210 {"ld16.nt1", M2, OpMXX6aHint (4, 0, 1, 0x28, 1), {R1, AR_CSD, MR3}, EMPTY},
212 {"ld16.nta", M2, OpMXX6aHint (4, 0, 1, 0x28, 3), {R1, AR_CSD, MR3}, EMPTY},
274 {"ld16.acq", M2, OpMXX6aHint (4, 0, 1, 0x2c, 0), {R1, AR_CSD, MR3}, EMPTY},
276 {"ld16.acq.nt1", M2, OpMXX6aHint (4, 0, 1, 0x2c, 1), {R1, AR_CSD, MR3}, EMPTY},
278 {"ld16.acq.nta", M2, OpMXX6aHint (4, 0, 1, 0x2c, 3), {R1, AR_CSD, MR3}, EMPTY},
730 {"ld16", M2, OpMXX6aHintHlfa (4, 0, 1, 0x28, 0, 0), {R1, AR_CSD, MR3}, EMPTY},
732 {"ld16.nt1", M2, OpMXX6aHintHlfa (4, 0, 1, 0x28, 1, 0), {R1, AR_CSD, MR3}, EMPTY},
733 {"ld16.d1", M2, OpMXX6aHintHlfa (4, 0, 1, 0x28, 1, 0), {R1, AR_CSD, MR3}, PSEUDO, 0, NULL},
[all …]
/netbsd-src/external/apache2/llvm/dist/clang/lib/Driver/
H A DMultilib.cpp152 MultilibSet &MultilibSet::Either(const Multilib &M1, const Multilib &M2) { in Either() argument
153 return Either({M1, M2}); in Either()
156 MultilibSet &MultilibSet::Either(const Multilib &M1, const Multilib &M2, in Either() argument
158 return Either({M1, M2, M3}); in Either()
161 MultilibSet &MultilibSet::Either(const Multilib &M1, const Multilib &M2, in Either() argument
163 return Either({M1, M2, M3, M4}); in Either()
166 MultilibSet &MultilibSet::Either(const Multilib &M1, const Multilib &M2, in Either() argument
169 return Either({M1, M2, M3, M4, M5}); in Either()

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