Searched refs:LoOpc (Results 1 – 6 of 6) sorted by relevance
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
| H A D | HexagonCopyToCombine.cpp | 189 unsigned LoOpc = LowRegInst.getOpcode(); in areCombinableOperations() local
202 verifyOpc(LoOpc); in areCombinableOperations()
204 if (HiOpc == Hexagon::V6_vassign || LoOpc == Hexagon::V6_vassign) in areCombinableOperations()
205 return HiOpc == LoOpc; in areCombinableOperations()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/ |
| H A D | MipsSEInstrInfo.h | 101 unsigned LoOpc, unsigned HiOpc,
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| H A D | MipsSEInstrInfo.cpp | 729 unsigned LoOpc, in expandPseudoMTLoHi() argument
740 MachineInstrBuilder LoInst = BuildMI(MBB, I, DL, get(LoOpc)); in expandPseudoMTLoHi()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeIntegerTypes.cpp | 2521 ISD::NodeType LoOpc; in ExpandIntRes_MINMAX() local
2523 std::tie(CondC, LoOpc) = getExpandedMinMaxOps(N->getOpcode()); in ExpandIntRes_MINMAX()
2546 SDValue LoMinMax = DAG.getNode(LoOpc, DL, NVT, {LHSL, RHSL}); in ExpandIntRes_MINMAX()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 3932 unsigned LoOpc = IsAdd ? AMDGPU::S_ADD_U32 : AMDGPU::S_SUB_U32; in EmitInstrWithCustomInserter() local
3934 BuildMI(*BB, MI, DL, TII->get(LoOpc), DestSub0).add(Src0Sub0).add(Src1Sub0); in EmitInstrWithCustomInserter()
3987 unsigned LoOpc = IsAdd ? AMDGPU::V_ADD_CO_U32_e64 : AMDGPU::V_SUB_CO_U32_e64; in EmitInstrWithCustomInserter() local
3988 MachineInstr *LoHalf = BuildMI(*BB, MI, DL, TII->get(LoOpc), DestSub0) in EmitInstrWithCustomInserter()
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| H A D | SIInstrInfo.cpp | 6418 unsigned LoOpc = IsAdd ? AMDGPU::V_ADD_CO_U32_e64 : AMDGPU::V_SUB_CO_U32_e64; in splitScalar64BitAddSub() local
6420 BuildMI(MBB, MII, DL, get(LoOpc), DestSub0) in splitScalar64BitAddSub()
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