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Searched refs:LaneBitmask (Results 1 – 25 of 54) sorted by relevance

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/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/MC/
H A DLaneBitmask.h39 struct LaneBitmask { struct
45 constexpr LaneBitmask() = default; argument
46 explicit constexpr LaneBitmask(Type V) : Mask(V) {} in LaneBitmask() argument
48 constexpr bool operator== (LaneBitmask M) const { return Mask == M.Mask; }
49 constexpr bool operator!= (LaneBitmask M) const { return Mask != M.Mask; }
50 constexpr bool operator< (LaneBitmask M) const { return Mask < M.Mask; }
55 constexpr LaneBitmask operator~() const { argument
56 return LaneBitmask(~Mask);
58 constexpr LaneBitmask operator|(LaneBitmask M) const {
59 return LaneBitmask(Mask | M.Mask);
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/
H A DDetectDeadLanes.cpp50 LaneBitmask UsedLanes;
51 LaneBitmask DefinedLanes;
72 void addUsedLanesOnOperand(const MachineOperand &MO, LaneBitmask UsedLanes);
77 void transferUsedLanesStep(const MachineInstr &MI, LaneBitmask UsedLanes);
83 LaneBitmask DefinedLanes);
88 LaneBitmask transferDefinedLanes(const MachineOperand &Def, unsigned OpNum,
89 LaneBitmask DefinedLanes) const;
93 LaneBitmask transferUsedLanes(const MachineInstr &MI, LaneBitmask UsedLanes,
98 LaneBitmask determineInitialDefinedLanes(unsigned Reg);
99 LaneBitmask determineInitialUsedLanes(unsigned Reg);
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H A DRegisterPressure.cpp52 LaneBitmask PrevMask, LaneBitmask NewMask) { in increaseSetPressure()
66 LaneBitmask PrevMask, LaneBitmask NewMask) { in decreaseSetPressure()
156 LaneBitmask PreviousMask, in increaseRegPressure()
157 LaneBitmask NewMask) { in increaseRegPressure()
171 LaneBitmask PreviousMask, in decreaseRegPressure()
172 LaneBitmask NewMask) { in decreaseRegPressure()
367 LaneBitmask::getNone(), Pair.LaneMask); in initLiveThru()
371 static LaneBitmask getRegLanes(ArrayRef<RegisterMaskPair> RegUnits, in getRegLanes()
377 return LaneBitmask::getNone(); in getRegLanes()
401 RegUnits.push_back(RegisterMaskPair(RegUnit, LaneBitmask::getNone())); in setRegZero()
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H A DRDFRegisters.cpp56 UnitInfos[U].Mask = LaneBitmask::getAll(); in PhysicalRegisterInfo()
60 std::pair<uint32_t,LaneBitmask> P = *I; in PhysicalRegisterInfo()
69 UI.Mask = LaneBitmask::getAll(); in PhysicalRegisterInfo()
145 std::pair<RegisterId,LaneBitmask> PA = *UMA; in aliasRR()
151 std::pair<RegisterId,LaneBitmask> PB = *UMB; in aliasRR()
174 if (RR.Mask == LaneBitmask::getAll()) in aliasRM()
185 LaneBitmask M = RR.Mask; in aliasRM()
187 LaneBitmask SM = TRI.getSubRegIndexLaneMask(SI.getSubRegIndex()); in aliasRM()
237 LaneBitmask RCM = RI.RegClass ? RI.RegClass->LaneMask in mapTo()
238 : LaneBitmask::getAll(); in mapTo()
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H A DLiveIntervalCalc.cpp70 LaneBitmask SubMask = SubReg != 0 ? TRI.getSubRegIndexLaneMask(SubReg) in calculate()
75 LaneBitmask ClassMask = MRI->getMaxLaneMaskForVReg(Reg); in calculate()
112 extendToUses(LI, Reg, LaneBitmask::getAll()); in calculate()
130 extendToUses(MainRange, LI.reg(), LaneBitmask::getAll(), &LI); in constructMainRangeFromSubranges()
146 LaneBitmask Mask, LiveInterval *LI) { in extendToUses()
170 LaneBitmask SLM = TRI.getSubRegIndexLaneMask(SubReg); in extendToUses()
H A DRegisterCoalescer.cpp150 LaneBitmask ShrinkMask;
224 LaneBitmask PrunedLanes);
255 LaneBitmask LaneMask, CoalescerPair &CP,
261 LaneBitmask LaneMask, const CoalescerPair &CP);
969 LaneBitmask Mask = MRI->getMaxLaneMaskForVReg(IntA.reg()); in removeCopyByCommutingDef()
972 LaneBitmask Mask = MRI->getMaxLaneMaskForVReg(IntB.reg()); in removeCopyByCommutingDef()
976 LaneBitmask MaskA; in removeCopyByCommutingDef()
1442 LaneBitmask MaxMask = MRI->getMaxLaneMaskForVReg(DstReg); in reMaterializeTrivialDef()
1466 LaneBitmask DstMask = TRI->getSubRegIndexLaneMask(NewIdx); in reMaterializeTrivialDef()
1601 LaneBitmask SrcMask = TRI->getSubRegIndexLaneMask(SrcSubIdx); in eliminateUndefCopy()
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H A DScheduleDAGInstrs.cpp368 LaneBitmask ScheduleDAGInstrs::getLaneMaskForMO(const MachineOperand &MO) const in getLaneMaskForMO()
374 return LaneBitmask::getAll(); in getLaneMaskForMO()
400 LaneBitmask DefLaneMask; in addVRegDefDeps()
401 LaneBitmask KillLaneMask; in addVRegDefDeps()
407 KillLaneMask = IsKill ? LaneBitmask::getAll() : DefLaneMask; in addVRegDefDeps()
425 DefLaneMask = LaneBitmask::getAll(); in addVRegDefDeps()
426 KillLaneMask = LaneBitmask::getAll(); in addVRegDefDeps()
436 LaneBitmask LaneMask = I->LaneMask; in addVRegDefDeps()
474 LaneBitmask LaneMask = DefLaneMask; in addVRegDefDeps()
497 LaneBitmask OverlapMask = V2SU.LaneMask & LaneMask; in addVRegDefDeps()
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H A DLiveInterval.cpp884 LaneBitmask LaneMask, in stripValuesNotDefiningMask()
909 LaneBitmask OrigMask = TRI.getSubRegIndexLaneMask(MOI->getSubReg()); in stripValuesNotDefiningMask()
910 LaneBitmask ExpectedDefMask = in stripValuesNotDefiningMask()
931 BumpPtrAllocator &Allocator, LaneBitmask LaneMask, in refineSubRanges()
935 LaneBitmask ToApply = LaneMask; in refineSubRanges()
937 LaneBitmask SRMask = SR.LaneMask; in refineSubRanges()
938 LaneBitmask Matching = SRMask & LaneMask; in refineSubRanges()
977 LaneBitmask LaneMask, in computeSubRangeUndefs()
981 LaneBitmask VRegMask = MRI.getMaxLaneMaskForVReg(reg()); in computeSubRangeUndefs()
989 LaneBitmask DefMask = TRI.getSubRegIndexLaneMask(SubReg); in computeSubRangeUndefs()
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H A DSplitKit.h361 LiveInterval::SubRange &getSubRangeForMaskExact(LaneBitmask LM,
368 LiveInterval::SubRange &getSubRangeForMask(LaneBitmask LM, LiveInterval &LI);
435 LiveRange &LR, LaneBitmask LM,
451 SlotIndex buildCopy(Register FromReg, Register ToReg, LaneBitmask LaneMask,
H A DTargetRegisterInfo.cpp55 const LaneBitmask *SRILaneMasks, in TargetRegisterInfo()
56 LaneBitmask SRICoveringLanes, in TargetRegisterInfo()
525 LaneBitmask LaneMask, SmallVectorImpl<unsigned> &NeededIndexes) const { in getCoveringSubRegIndexes()
534 LaneBitmask SubRegMask = getSubRegIndexLaneMask(Idx); in getCoveringSubRegIndexes()
561 LaneBitmask LanesLeft = LaneMask & ~getSubRegIndexLaneMask(BestIdx); in getCoveringSubRegIndexes()
566 LaneBitmask SubRegMask = getSubRegIndexLaneMask(Idx); in getCoveringSubRegIndexes()
H A DLiveIntervals.cpp377 Register Reg, LaneBitmask LaneMask) { in extendSegmentsToUses()
383 auto getSubRange = [](const LiveInterval &I, LaneBitmask M) in extendSegmentsToUses()
504 extendSegmentsToUses(NewLR, WorkList, Reg, LaneBitmask::getNone()); in shrinkToUses()
579 LaneBitmask LaneMask = TRI->getSubRegIndexLaneMask(SubReg); in shrinkToUses()
769 LaneBitmask DefinedLanesMask; in addKillFlags()
772 DefinedLanesMask = LaneBitmask::getNone(); in addKillFlags()
783 DefinedLanesMask = LaneBitmask::getAll(); in addKillFlags()
792 LaneBitmask UseMask = SubReg ? TRI->getSubRegIndexLaneMask(SubReg) in addKillFlags()
1032 LaneBitmask LaneMask = SubReg ? TRI.getSubRegIndexLaneMask(SubReg) in updateAllRanges()
1040 updateRange(LI, Reg, LaneBitmask::getNone()); in updateAllRanges()
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H A DMachineVerifier.cpp230 LaneBitmask LaneMask) const;
236 void report_context_lanemask(LaneBitmask LaneMask) const;
246 LaneBitmask LaneMask = LaneBitmask::getNone());
250 LaneBitmask LaneMask = LaneBitmask::getNone());
261 LaneBitmask);
264 LaneBitmask);
266 LaneBitmask LaneMask = LaneBitmask::getNone());
517 LaneBitmask LaneMask) const { in report_context()
552 void MachineVerifier::report_context_lanemask(LaneBitmask LaneMask) const { in report_context_lanemask()
2093 LaneBitmask LaneMask) { in checkLivenessAtUse()
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/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
H A DRegisterPressure.h41 LaneBitmask LaneMask;
43 RegisterMaskPair(Register RegUnit, LaneBitmask LaneMask) in RegisterMaskPair()
264 LaneBitmask LaneMask;
266 IndexMaskPair(unsigned Index, LaneBitmask LaneMask) in IndexMaskPair()
295 LaneBitmask contains(Register Reg) const { in contains()
299 return LaneBitmask::getNone(); in contains()
305 LaneBitmask insert(RegisterMaskPair Pair) { in insert()
309 LaneBitmask PrevMask = InsertRes.first->LaneMask; in insert()
313 return LaneBitmask::getNone(); in insert()
318 LaneBitmask erase(RegisterMaskPair Pair) { in erase()
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H A DTargetRegisterInfo.h56 const LaneBitmask LaneMask;
204 LaneBitmask getLaneMask() const { in getLaneMask()
243 const LaneBitmask *SubRegIndexLaneMasks;
246 LaneBitmask CoveringLanes;
255 const LaneBitmask *SRILaneMasks,
256 LaneBitmask CoveringLanes,
375 LaneBitmask getSubRegIndexLaneMask(unsigned SubIdx) const { in getSubRegIndexLaneMask()
386 LaneBitmask LaneMask,
412 LaneBitmask getCoveringLanes() const { return CoveringLanes; } in getCoveringLanes()
638 LaneBitmask composeSubRegIndexLaneMask(unsigned IdxA, in composeSubRegIndexLaneMask()
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H A DRDFRegisters.h73 LaneBitmask Mask = LaneBitmask::getNone();
76 explicit RegisterRef(RegisterId R, LaneBitmask M = LaneBitmask::getAll())
77 : Reg(R), Mask(R != 0 ? M : LaneBitmask::getNone()) {} in Reg()
97 std::hash<LaneBitmask::Type>{}(Mask.getAsInteger()); in hash()
147 LaneBitmask Mask;
205 using MapType = std::map<RegisterId, LaneBitmask>;
251 PrintLaneMaskOpt(LaneBitmask M) : Mask(M) {} in PrintLaneMaskOpt()
252 LaneBitmask Mask;
H A DScheduleDAGInstrs.h54 LaneBitmask LaneMask;
57 VReg2SUnit(unsigned VReg, LaneBitmask LaneMask, SUnit *SU) in VReg2SUnit()
69 VReg2SUnitOperIdx(unsigned VReg, LaneBitmask LaneMask, in VReg2SUnitOperIdx()
372 LaneBitmask getLaneMaskForMO(const MachineOperand &MO) const;
H A DLiveIntervalCalc.h39 void extendToUses(LiveRange &LR, Register Reg, LaneBitmask LaneMask,
55 extendToUses(LR, PhysReg, LaneBitmask::getAll()); in extendToUses()
H A DLiveInterval.h690 LaneBitmask LaneMask;
693 SubRange(LaneBitmask LaneMask) : LaneMask(LaneMask) {} in SubRange()
696 SubRange(LaneBitmask LaneMask, const LiveRange &Other, in SubRange()
780 LaneBitmask LaneMask) { in createSubRange()
789 LaneBitmask LaneMask, in createSubRangeFrom()
821 LaneBitmask LaneMask,
864 void refineSubRanges(BumpPtrAllocator &Allocator, LaneBitmask LaneMask,
H A DMachineBasicBlock.h104 LaneBitmask LaneMask;
106 RegisterMaskPair(MCPhysReg PhysReg, LaneBitmask LaneMask)
368 LaneBitmask LaneMask = LaneBitmask::getAll()) {
390 LaneBitmask LaneMask = LaneBitmask::getAll());
394 LaneBitmask LaneMask = LaneBitmask::getAll()) const;
H A DLiveRegUnits.h93 void addRegMasked(MCPhysReg Reg, LaneBitmask Mask) { in addRegMasked()
95 LaneBitmask UnitMask = (*Unit).second; in addRegMasked()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
H A DGCNRegPressure.h69 LaneBitmask PrevMask,
70 LaneBitmask NewMask,
109 using LiveRegSet = DenseMap<unsigned, LaneBitmask>;
196 LaneBitmask getLiveLaneMask(unsigned Reg,
266 Res.inc(RM.first, LaneBitmask::getNone(), RM.second, MRI); in getRegPressure()
H A DGCNRegPressure.cpp85 LaneBitmask PrevMask, in inc()
86 LaneBitmask NewMask, in inc()
187 static LaneBitmask getDefRegMask(const MachineOperand &MO, in getDefRegMask()
199 static LaneBitmask getUsedRegMask(const MachineOperand &MO, in getUsedRegMask()
244 LaneBitmask llvm::getLiveLaneMask(unsigned Reg, in getLiveLaneMask()
248 LaneBitmask LiveMask; in getLiveLaneMask()
378 It.second = LaneBitmask::getNone(); in advanceBeforeNext()
H A DSIFormMemoryClauses.cpp35 typedef DenseMap<unsigned, std::pair<unsigned, LaneBitmask>> RegUse;
178 LaneBitmask Mask = TRI->getSubRegIndexLaneMask(MO.getSubReg()); in canBundle()
227 LaneBitmask Mask = Reg.isVirtual() in collectRegUses()
229 : LaneBitmask::getAll(); in collectRegUses()
362 LaneBitmask KilledMask; in runOnMachineFunction()
/netbsd-src/external/apache2/llvm/dist/llvm/utils/TableGen/
H A DCodeGenRegisters.h51 LaneBitmask Mask;
72 mutable LaneBitmask LaneMask;
134 LaneBitmask computeLaneMask() const;
227 typedef SmallVector<LaneBitmask, 16> RegUnitLaneMaskList;
236 ArrayRef<LaneBitmask> getRegUnitLaneMasks() const { in getRegUnitLaneMasks()
336 LaneBitmask LaneMask;
797 LaneBitmask CoveringLanes;
H A DCodeGenRegisters.cpp105 LaneBitmask CodeGenSubRegIndex::computeLaneMask() const { in computeLaneMask()
111 LaneMask = LaneBitmask::getAll(); in computeLaneMask()
114 LaneBitmask M; in computeLaneMask()
1438 CoveringLanes = LaneBitmask::getAll(); in computeSubRegLaneMasks()
1441 if (Bit > LaneBitmask::BitWidth) { in computeSubRegLaneMasks()
1446 Idx.LaneMask = LaneBitmask::getLane(Bit); in computeSubRegLaneMasks()
1449 Idx.LaneMask = LaneBitmask::getNone(); in computeSubRegLaneMasks()
1469 assert(Idx.LaneMask == LaneBitmask::getLane(DstBit) && in computeSubRegLaneMasks()
1471 MaskRolPair MaskRol = { LaneBitmask::getLane(0), (uint8_t)DstBit }; in computeSubRegLaneMasks()
1485 LaneBitmask SrcMask = LaneBitmask::getLane(SrcBit); in computeSubRegLaneMasks()
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