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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/
H A DRISCV.td24 "'A' (Atomic Instructions)">;
27 "'A' (Atomic Instructions)">;
54 "'C' (Compressed Instructions)">;
57 "'C' (Compressed Instructions)">;
61 "'Zba' (Address calculation 'B' Instructions)">;
64 "'Zba' (Address calculation 'B' Instructions)">;
69 "'Zbb' (Base 'B' Instructions)">;
72 "'Zbb' (Base 'B' Instructions)">;
76 "'Zbc' (Carry-Less 'B' Instructions)">;
79 "'Zbc' (Carry-Less 'B' Instructions)">;
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H A DRISCVInstrInfoV.td446 // Instructions
461 // Vector Unit-Stride Instructions
480 // Vector Strided Instructions
491 // Vector Indexed Instructions
534 // Refer to 11.2 Widening Vector Arithmetic Instructions
570 // Vector Integer Add-with-Carry / Subtract-with-Borrow Instructions
582 // Vector Bitwise Logical Instructions
590 // Vector Single-Width Bit Shift Instructions
595 // Vector Narrowing Integer Right Shift Instructions
596 // Refer to 11.3. Narrowing Vector Arithmetic Instructions
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/netbsd-src/external/apache2/llvm/dist/llvm/tools/llvm-exegesis/lib/
H A DParallelSnippetGenerator.cpp95 std::vector<InstructionTemplate> &Instructions) const { in instantiateMemoryOperands()
100 const size_t OriginalInstructionsSize = Instructions.size(); in instantiateMemoryOperands()
102 for (InstructionTemplate &IT : Instructions) { in instantiateMemoryOperands()
107 while (Instructions.size() < kMinNumDifferentAddresses) { in instantiateMemoryOperands()
108 InstructionTemplate IT = Instructions[I % OriginalInstructionsSize]; in instantiateMemoryOperands()
111 Instructions.push_back(std::move(IT)); in instantiateMemoryOperands()
121 std::vector<InstructionTemplate> Instructions; in generateSnippetUsingStaticRenaming() local
142 return Instructions; in generateSnippetUsingStaticRenaming()
153 Instructions.push_back(std::move(TmpIT)); in generateSnippetUsingStaticRenaming()
170 CT.Instructions.push_back(std::move(Variant)); in generateCodeTemplates()
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H A DSnippetRepetitor.cpp27 FillFunction Repeat(ArrayRef<MCInst> Instructions, in Repeat() argument
29 return [Instructions, MinInstructions](FunctionFiller &Filler) { in Repeat()
31 if (!Instructions.empty()) { in Repeat()
33 Entry.addInstructions(Instructions); in Repeat()
34 for (unsigned I = Instructions.size(); I < MinInstructions; ++I) { in Repeat()
35 Entry.addInstruction(Instructions[I % Instructions.size()]); in Repeat()
56 FillFunction Repeat(ArrayRef<MCInst> Instructions, in Repeat() argument
58 return [this, Instructions, MinInstructions](FunctionFiller &Filler) { in Repeat()
65 const APInt LoopCount(32, (MinInstructions + Instructions.size() - 1) / in Repeat()
66 Instructions.size()); in Repeat()
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H A DAnalysis.cpp135 assert(!Point.Key.Instructions.empty()); in printInstructionRowCsv()
225 assert(!Point.Key.Instructions.empty()); in makePointsPerSchedClass()
253 const std::vector<MCInst> &Instructions, in writeParallelSnippetHtml() argument
255 if (Instructions.empty()) in writeParallelSnippetHtml()
257 writeEscaped<kEscapeHtml>(OS, InstrInfo.getName(Instructions[0].getOpcode())); in writeParallelSnippetHtml()
258 if (Instructions.size() > 1) in writeParallelSnippetHtml()
259 OS << " (x" << Instructions.size() << ")"; in writeParallelSnippetHtml()
265 const std::vector<MCInst> &Instructions, in writeLatencySnippetHtml() argument
268 for (const MCInst &Instr : Instructions) { in writeLatencySnippetHtml()
284 writeLatencySnippetHtml(OS, Point.Key.Instructions, *InstrInfo_); in printPointHtml()
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H A DSnippetGenerator.cpp78 for (InstructionTemplate &IT : CT.Instructions) { in generateConfigurations()
81 BC.Key.Instructions.push_back(IT.build()); in generateConfigurations()
86 computeRegisterInitialValues(CT.Instructions); in generateConfigurations()
101 const std::vector<InstructionTemplate> &Instructions) const { in computeRegisterInitialValues()
108 for (const InstructionTemplate &IT : Instructions) { in computeRegisterInitialValues()
159 CT.Instructions.push_back(std::move(Variant)); in generateSelfAliasingCodeTemplates()
171 CT.Instructions.push_back(std::move(Variant)); in generateUnconstrainedCodeTemplates()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/MCA/Stages/
H A DEntryStage.cpp38 Instructions.emplace_back(std::move(Inst)); in getNextInstruction()
61 auto Range = make_range(&Instructions[NumRetired], Instructions.end()); in cycleEnd()
66 NumRetired = std::distance(Instructions.begin(), It); in cycleEnd()
68 if ((NumRetired * 2) >= Instructions.size()) { in cycleEnd()
69 Instructions.erase(Instructions.begin(), It); in cycleEnd()
/netbsd-src/external/gpl3/gcc/dist/gcc/config/arm/
H A Dcortex-a9-neon.md333 ;; Instructions using this reservation read their source operands at N2, and
340 ;; Instructions using this reservation read their (D|Q)m operands at N1,
347 ;; Instructions using this reservation read their source operands at N1, and
354 ;; Instructions using this reservation read their source operands at N2, and
361 ;; Instructions using this reservation read their (D|Q)m operands at N1,
368 ;; Instructions using this reservation read their source operands at N1, and
375 ;; Instructions using this reservation produce a result at N3.
381 ;; Instructions using this reservation read their (D|Q)n operands at N2,
389 ;; Instructions using this reservation read their (D|Q)n operands at N2,
397 ;; Instructions using this reservation read their source operands at N2, and
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H A Dcortex-a8-neon.md416 ;; Instructions using this reservation read their source operands at N2, and
423 ;; Instructions using this reservation read their (D|Q)m operands at N1,
430 ;; Instructions using this reservation read their source operands at N1, and
437 ;; Instructions using this reservation read their source operands at N2, and
444 ;; Instructions using this reservation read their (D|Q)m operands at N1,
451 ;; Instructions using this reservation read their source operands at N1, and
458 ;; Instructions using this reservation produce a result at N3.
464 ;; Instructions using this reservation read their (D|Q)n operands at N2,
472 ;; Instructions using this reservation read their (D|Q)n operands at N2,
480 ;; Instructions using this reservation read their source operands at N2, and
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/netbsd-src/external/gpl3/gcc.old/dist/gcc/config/arm/
H A Dcortex-a9-neon.md333 ;; Instructions using this reservation read their source operands at N2, and
340 ;; Instructions using this reservation read their (D|Q)m operands at N1,
347 ;; Instructions using this reservation read their source operands at N1, and
354 ;; Instructions using this reservation read their source operands at N2, and
361 ;; Instructions using this reservation read their (D|Q)m operands at N1,
368 ;; Instructions using this reservation read their source operands at N1, and
375 ;; Instructions using this reservation produce a result at N3.
381 ;; Instructions using this reservation read their (D|Q)n operands at N2,
389 ;; Instructions using this reservation read their (D|Q)n operands at N2,
397 ;; Instructions using this reservation read their source operands at N2, and
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H A Dcortex-a8-neon.md416 ;; Instructions using this reservation read their source operands at N2, and
423 ;; Instructions using this reservation read their (D|Q)m operands at N1,
430 ;; Instructions using this reservation read their source operands at N1, and
437 ;; Instructions using this reservation read their source operands at N2, and
444 ;; Instructions using this reservation read their (D|Q)m operands at N1,
451 ;; Instructions using this reservation read their source operands at N1, and
458 ;; Instructions using this reservation produce a result at N3.
464 ;; Instructions using this reservation read their (D|Q)n operands at N2,
472 ;; Instructions using this reservation read their (D|Q)n operands at N2,
480 ;; Instructions using this reservation read their source operands at N2, and
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/CSKY/
H A DCSKYInstrFormats.td62 // Instructions(7): grs, lrs32.b, lrs32.h, lrs32.w, srs32.b, srs32.h, srs32.w
73 // Instructions(1): ori32
87 // Instructions(3): movi32, movih32, (bgeni32)
103 // Instructions(1): lrw32
115 // Instructions(5): bt32, bf32, br32, jmpi32, jsri32
125 // Instructions(2): jmp32, jsr32
137 // Instructions(1): jmpix32
151 // Instructions(1): rts32
162 // Instructions(1): rte32
176 // Instructions(3): cmpnei32, cmphsi32, cmplti32
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Analysis/
H A DStackLifetime.cpp57 auto It = std::upper_bound(Instructions.begin() + ItBB->getSecond().first + 1, in isAliveAfter()
58 Instructions.begin() + ItBB->getSecond().second, I, in isAliveAfter()
63 unsigned InstNum = It - Instructions.begin(); in isAliveAfter()
129 LLVM_DEBUG(dbgs() << " " << Instructions.size() << ": BB " << BB->getName() in collectMarkers()
131 auto BBStart = Instructions.size(); in collectMarkers()
132 Instructions.push_back(nullptr); in collectMarkers()
139 BlockInstRange[BB] = std::make_pair(BBStart, Instructions.size()); in collectMarkers()
144 LLVM_DEBUG(dbgs() << " " << Instructions.size() << ": " in collectMarkers()
148 BBMarkers[BB].push_back({Instructions.size(), M}); in collectMarkers()
149 Instructions.push_back(I); in collectMarkers()
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/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/DebugInfo/DWARF/
H A DDWARFDebugFrame.h415 iterator begin() { return Instructions.begin(); } in begin()
416 const_iterator begin() const { return Instructions.begin(); } in begin()
417 iterator end() { return Instructions.end(); } in end()
418 const_iterator end() const { return Instructions.end(); } in end()
420 unsigned size() const { return (unsigned)Instructions.size(); } in size()
421 bool empty() const { return Instructions.empty(); } in empty()
441 void addInstruction(const Instruction &I) { Instructions.push_back(I); } in addInstruction()
447 std::vector<Instruction> Instructions;
454 Instructions.push_back(Instruction(Opcode)); in addInstruction()
459 Instructions.push_back(Instruction(Opcode)); in addInstruction()
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/netbsd-src/external/apache2/llvm/dist/llvm/utils/TableGen/
H A DCodeGenTarget.h52 std::unique_ptr<CodeGenInstruction>> Instructions; variable
147 if (Instructions.empty()) ReadInstructions(); in getInstructions()
148 return Instructions; in getInstructions()
153 if (Instructions.empty()) ReadInstructions(); in getInstruction()
154 auto I = Instructions.find(InstRec); in getInstruction()
155 assert(I != Instructions.end() && "Not an instruction"); in getInstruction()
/netbsd-src/external/apache2/llvm/dist/llvm/tools/llvm-exegesis/lib/Mips/
H A DTarget.cpp95 std::vector<MCInst> Instructions; in loadImmediate() local
101 Instructions.push_back( in loadImmediate()
106 Instructions.push_back( in loadImmediate()
112 Instructions.push_back( in loadImmediate()
120 Instructions.push_back( in loadImmediate()
127 return Instructions; in loadImmediate()
/netbsd-src/external/apache2/llvm/dist/llvm/tools/llvm-cfi-verify/lib/
H A DFileAnalysis.cpp124 Instructions.find(InstrMeta.VMAddress); in getPrevInstructionSequential()
125 if (KV == Instructions.end() || KV == Instructions.begin()) in getPrevInstructionSequential()
137 Instructions.find(InstrMeta.VMAddress); in getNextInstructionSequential()
138 if (KV == Instructions.end() || ++KV == Instructions.end()) in getNextInstructionSequential()
156 const auto &InstrKV = Instructions.find(Address); in getInstruction()
157 if (InstrKV == Instructions.end()) in getInstruction()
164 const auto &InstrKV = Instructions.find(Address); in getInstructionOrDie()
165 assert(InstrKV != Instructions.end() && "Address doesn't exist."); in getInstructionOrDie()
243 const auto &SourceInstrKV = Instructions.find(SourceInstrAddress); in getDirectControlFlowXRefs()
244 if (SourceInstrKV == Instructions.end()) { in getDirectControlFlowXRefs()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/MC/
H A DMCWin64EH.cpp183 uint8_t numCodes = CountOfUnwindCodes(info->Instructions); in EmitUnwindInfo()
188 WinEH::Instruction &frameInst = info->Instructions[info->LastFrameInst]; in EmitUnwindInfo()
195 uint8_t numInst = info->Instructions.size(); in EmitUnwindInfo()
197 WinEH::Instruction inst = info->Instructions.back(); in EmitUnwindInfo()
198 info->Instructions.pop_back(); in EmitUnwindInfo()
547 static void simplifyOpcodes(std::vector<WinEH::Instruction> &Instructions, in simplifyOpcodes() argument
601 for (auto It = Instructions.rbegin(); It != Instructions.rend(); It++) in simplifyOpcodes()
604 for (WinEH::Instruction &Inst : Instructions) in simplifyOpcodes()
619 if (Epilog.size() > info->Instructions.size()) in checkPackedEpilog()
625 if (info->Instructions[I] != Epilog[Epilog.size() - 1 - I]) in checkPackedEpilog()
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H A DMCStreamer.cpp126 (MAB ? MAB->generateCompactUnwindEncoding(FI.Instructions) : 0); in generateCompactUnwindEncodings()
485 CurFrame->Instructions.push_back(Instruction); in emitCFIDefCfa()
496 CurFrame->Instructions.push_back(Instruction); in emitCFIDefCfaOffset()
506 CurFrame->Instructions.push_back(Instruction); in emitCFIAdjustCfaOffset()
516 CurFrame->Instructions.push_back(Instruction); in emitCFIDefCfaRegister()
527 CurFrame->Instructions.push_back(Instruction); in emitCFIOffset()
537 CurFrame->Instructions.push_back(Instruction); in emitCFIRelOffset()
563 CurFrame->Instructions.push_back(Instruction); in emitCFIRememberState()
573 CurFrame->Instructions.push_back(Instruction); in emitCFIRestoreState()
583 CurFrame->Instructions.push_back(Instruction); in emitCFISameValue()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/MCTargetDesc/
H A DX86WinCOFFTargetStreamer.cpp63 SmallVector<FPOInstruction, 5> Instructions; member
187 if (!CurFPOData->Instructions.empty()) { in emitFPOEndProc()
189 CurFPOData->Instructions.clear(); in emitFPOEndProc()
210 CurFPOData->Instructions.push_back(Inst); in emitFPOSetFrame()
221 CurFPOData->Instructions.push_back(Inst); in emitFPOPushReg()
232 CurFPOData->Instructions.push_back(Inst); in emitFPOStackAlloc()
239 if (!llvm::any_of(CurFPOData->Instructions, [](const FPOInstruction &Inst) { in emitFPOStackAlign()
250 CurFPOData->Instructions.push_back(Inst); in emitFPOStackAlign()
414 for (const FPOInstruction &Inst : FPO->Instructions) { in emitFPOData()
/netbsd-src/external/apache2/llvm/dist/llvm/tools/llvm-mca/
H A DCodeRegion.h56 llvm::SmallVector<llvm::MCInst, 8> Instructions; variable
69 Instructions.emplace_back(Instruction); in addInstruction()
76 bool empty() const { return Instructions.empty(); } in empty()
79 llvm::ArrayRef<llvm::MCInst> getInstructions() const { return Instructions; } in getInstructions()
/netbsd-src/external/gpl3/gcc/dist/gcc/config/aarch64/
H A Dsaphira.md62 ;; SIMD Floating-Point Instructions
149 ;; SIMD Integer Instructions
186 ;; SIMD Load Instructions
223 ;; Arithmetic and Logical Instructions
230 ;; SIMD Miscellaneous Instructions
286 ;; SIMD Store Instructions
311 ;; Branch Instructions
350 ;; FP Load Instructions
364 ;; FP Data Processing Instructions
438 ;; FP Miscellaneous Instructions
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/netbsd-src/external/gpl3/gcc.old/dist/gcc/config/aarch64/
H A Dsaphira.md62 ;; SIMD Floating-Point Instructions
149 ;; SIMD Integer Instructions
186 ;; SIMD Load Instructions
223 ;; Arithmetic and Logical Instructions
230 ;; SIMD Miscellaneous Instructions
286 ;; SIMD Store Instructions
311 ;; Branch Instructions
350 ;; FP Load Instructions
364 ;; FP Data Processing Instructions
438 ;; FP Miscellaneous Instructions
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/netbsd-src/external/apache2/llvm/dist/clang/include/clang/Basic/
H A Driscv_vector.td976 // 6. Configuration-Setting Instructions
1049 // 7.4. Vector Unit-Stride Instructions
1062 // 7.5. Vector Strided Instructions
1073 // 7.6. Vector Indexed Instructions
1099 // 12. Vector Integer Arithmetic Instructions
1140 // 12.4. Vector Integer Add-with-Carry / Subtract-with-Borrow Instructions
1150 // 12.5. Vector Bitwise Logical Instructions
1156 // 12.6. Vector Single-Width Bit Shift Instructions
1161 // 12.7. Vector Narrowing Integer Right Shift Instructions
1168 // 12.8. Vector Integer Comparison Instructions
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/
H A DMipsInstructionSelector.cpp755 SmallVector<struct Instr, 2> Instructions; in select() local
765 Instructions.emplace_back(Mips::XOR, Temp, LHS, RHS); in select()
766 Instructions.emplace_back(Mips::SLTiu, ICMPReg, Temp, 1); in select()
769 Instructions.emplace_back(Mips::XOR, Temp, LHS, RHS); in select()
770 Instructions.emplace_back(Mips::SLTu, ICMPReg, Mips::ZERO, Temp); in select()
773 Instructions.emplace_back(Mips::SLTu, ICMPReg, RHS, LHS); in select()
776 Instructions.emplace_back(Mips::SLTu, Temp, LHS, RHS); in select()
777 Instructions.emplace_back(Mips::XORi, ICMPReg, Temp, 1); in select()
780 Instructions.emplace_back(Mips::SLTu, ICMPReg, LHS, RHS); in select()
783 Instructions.emplace_back(Mips::SLTu, Temp, RHS, LHS); in select()
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