Searched refs:InstDesc (Results 1 – 7 of 7) sorted by relevance
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Analysis/ |
| H A D | IVDescriptors.cpp | 253 InstDesc ReduxDesc(false, nullptr); in AddReductionVar() 416 InstDesc IgnoredVal(false, nullptr); in AddReductionVar() 508 RecurrenceDescriptor::InstDesc 510 const InstDesc &Prev) { in isMinMaxSelectCmpPattern() 519 return InstDesc(Select, Prev.getRecKind()); in isMinMaxSelectCmpPattern() 525 return InstDesc(false, I); in isMinMaxSelectCmpPattern() 529 return InstDesc(I, RecurKind::UMin); in isMinMaxSelectCmpPattern() 531 return InstDesc(I, RecurKind::UMax); in isMinMaxSelectCmpPattern() 533 return InstDesc(I, RecurKind::SMax); in isMinMaxSelectCmpPattern() 535 return InstDesc(I, RecurKind::SMin); in isMinMaxSelectCmpPattern() [all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/Analysis/ |
| H A D | IVDescriptors.h | 81 class InstDesc { 83 InstDesc(bool IsRecur, Instruction *I, Instruction *ExactFP = nullptr) 87 InstDesc(Instruction *I, RecurKind K, Instruction *ExactFP = nullptr) 118 static InstDesc isRecurrenceInstr(Instruction *I, RecurKind Kind, 119 InstDesc &Prev, FastMathFlags FMF); 133 static InstDesc isMinMaxSelectCmpPattern(Instruction *I, 134 const InstDesc &Prev); 138 static InstDesc isConditionalRdxPattern(RecurKind Kind, Instruction *I);
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | AArch64SIMDInstrOpt.cpp | 160 bool shouldReplaceInst(MachineFunction *MF, const MCInstrDesc *InstDesc, 218 shouldReplaceInst(MachineFunction *MF, const MCInstrDesc *InstDesc, in shouldReplaceInst() argument 223 auto InstID = std::make_pair(InstDesc->getOpcode(), Subtarget); in shouldReplaceInst() 228 unsigned SCIdx = InstDesc->getSchedClass(); in shouldReplaceInst() 256 if (SchedModel.computeInstrLatency(InstDesc->getOpcode()) > ReplCost) in shouldReplaceInst()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | SIFoldOperands.cpp | 449 const MCInstrDesc &InstDesc = MI->getDesc(); in tryAddToFoldList() local 450 const MCOperandInfo &OpInfo = InstDesc.OpInfo[OpNo]; in tryAddToFoldList() 458 for (unsigned i = 0, e = InstDesc.getNumOperands(); i != e; ++i) { in tryAddToFoldList() 1552 const MCInstrDesc &InstDesc = UseMI->getDesc(); in tryFoldRegSequence() local 1553 const MCOperandInfo &OpInfo = InstDesc.OpInfo[OpIdx]; in tryFoldRegSequence()
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| H A D | SIInstrInfo.cpp | 3430 const MCInstrDesc &InstDesc = MI.getDesc(); in isImmOperandLegal() local 3431 const MCOperandInfo &OpInfo = InstDesc.OpInfo[OpNo]; in isImmOperandLegal() 3452 if (!isVOP3(MI) || !AMDGPU::isSISrcOperand(InstDesc, OpNo)) in isImmOperandLegal() 4632 const MCInstrDesc &InstDesc = MI.getDesc(); in isOperandLegal() local 4633 const MCOperandInfo &OpInfo = InstDesc.OpInfo[OpIdx]; in isOperandLegal() 4656 usesConstantBus(MRI, Op, InstDesc.OpInfo[i])) { in isOperandLegal() 4661 } else if (InstDesc.OpInfo[i].OperandType == AMDGPU::OPERAND_KIMM32) { in isOperandLegal() 4664 } else if (isVOP3(MI) && AMDGPU::isSISrcOperand(InstDesc, i) && in isOperandLegal() 4665 isLiteralConstantLike(Op, InstDesc.OpInfo[i])) { in isOperandLegal() 6335 const MCInstrDesc &InstDesc = get(Opcode); in splitScalar64BitUnaryOp() local [all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/MCTargetDesc/ |
| H A D | X86AsmBackend.cpp | 435 const MCInstrDesc &InstDesc = MCII->get(Jcc.getOpcode()); in isMacroFused() local 436 if (!InstDesc.isConditionalBranch()) in isMacroFused()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/AsmParser/ |
| H A D | AMDGPUAsmParser.cpp | 1970 const auto& InstDesc = AsmParser->getMII()->get(Inst.getOpcode()); in addLiteralImmOperand() local 1973 assert(AMDGPU::isSISrcOperand(InstDesc, OpNum)); in addLiteralImmOperand() 1976 assert(AMDGPU::isSISrcFPOperand(InstDesc, OpNum)); in addLiteralImmOperand() 1977 const unsigned Size = Imm.IsFPImm ? sizeof(double) : getOperandSize(InstDesc, OpNum); in addLiteralImmOperand() 1982 uint8_t OpTy = InstDesc.OpInfo[OpNum].OperandType; in addLiteralImmOperand() 1999 if (AMDGPU::isSISrcFPOperand(InstDesc, OpNum)) { // Expected 64-bit fp operand in addLiteralImmOperand()
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