| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
| H A D | UnreachableBlockElim.cpp | 174 Register InputReg = Input.getReg(); in runOnMachineFunction() local
179 if (InputReg != OutputReg) { in runOnMachineFunction()
183 MRI.constrainRegClass(InputReg, MRI.getRegClass(OutputReg)) && in runOnMachineFunction()
185 MRI.replaceRegWith(OutputReg, InputReg); in runOnMachineFunction()
194 .addReg(InputReg, getRegState(Input), InputSub); in runOnMachineFunction()
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| H A D | TargetInstrInfo.cpp | 1312 RegSubRegPairAndIdx &InputReg) const { in getExtractSubregInputs()
1317 return getExtractSubregLikeInputs(MI, DefIdx, InputReg); in getExtractSubregInputs()
1329 InputReg.Reg = MOReg.getReg(); in getExtractSubregInputs()
1330 InputReg.SubReg = MOReg.getSubReg(); in getExtractSubregInputs()
1331 InputReg.SubIdx = (unsigned)MOSubIdx.getImm(); in getExtractSubregInputs()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUCallLowering.cpp | 797 Register InputReg = MRI.createGenericVirtualRegister(ArgTy); in passSpecialInputs() local
800 LI->loadInputValue(InputReg, MIRBuilder, IncomingArg, ArgRC, ArgTy); in passSpecialInputs()
803 LI->getImplicitArgPtr(InputReg, MRI, MIRBuilder); in passSpecialInputs()
807 ArgRegs.emplace_back(OutgoingArg->getRegister(), InputReg); in passSpecialInputs()
847 Register InputReg; in passSpecialInputs() local
849 InputReg = MRI.createGenericVirtualRegister(S32); in passSpecialInputs()
850 LI->loadInputValue(InputReg, MIRBuilder, IncomingArgX, in passSpecialInputs()
860 InputReg = InputReg ? MIRBuilder.buildOr(S32, InputReg, Y).getReg(0) : Y; in passSpecialInputs()
869 InputReg = InputReg ? MIRBuilder.buildOr(S32, InputReg, Z).getReg(0) : Z; in passSpecialInputs()
872 if (!InputReg) { in passSpecialInputs()
[all …]
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| H A D | SILowerControlFlow.cpp | 657 Register InputReg = MI.getOperand(0).getReg(); in lowerInitExec() local
659 if (InputReg.isVirtual()) { in lowerInitExec()
660 MachineInstr *DefInstr = MRI->getVRegDef(InputReg); in lowerInitExec()
683 .addReg(InputReg) in lowerInitExec()
712 LIS->removeInterval(InputReg); in lowerInitExec()
713 LIS->createAndComputeVirtRegInterval(InputReg); in lowerInitExec()
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| H A D | SIFixSGPRCopies.cpp | 835 Register InputReg = MI.getOperand(i).getReg(); in processPHINode() local
836 MachineInstr *Def = MRI->getVRegDef(InputReg); in processPHINode()
837 if (TRI->isVectorRegister(*MRI, InputReg)) { in processPHINode()
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| H A D | SIISelLowering.cpp | 2739 SDValue InputReg; in passSpecialInputs() local
2742 InputReg = loadInputValue(DAG, ArgRC, ArgVT, DL, *IncomingArg); in passSpecialInputs()
2747 InputReg = getImplicitArgPtr(DAG, DL); in passSpecialInputs()
2751 RegsToPass.emplace_back(OutgoingArg->getRegister(), InputReg); in passSpecialInputs()
2757 SDValue ArgStore = storeStackInputValue(DAG, DL, Chain, InputReg, in passSpecialInputs()
2787 SDValue InputReg; in passSpecialInputs() local
2792 InputReg = loadInputValue(DAG, ArgRC, MVT::i32, DL, *IncomingArgX); in passSpecialInputs()
2798 InputReg = InputReg.getNode() ? in passSpecialInputs()
2799 DAG.getNode(ISD::OR, SL, MVT::i32, InputReg, Y) : Y; in passSpecialInputs()
2806 InputReg = InputReg.getNode() ? in passSpecialInputs()
[all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86FastISel.cpp | 2530 Register InputReg = getRegForValue(I->getOperand(0)); in X86SelectTrunc() local
2531 if (!InputReg) in X86SelectTrunc()
2537 updateValueMap(I, InputReg); in X86SelectTrunc()
2542 Register ResultReg = fastEmitInst_extractsubreg(MVT::i8, InputReg, in X86SelectTrunc()
2600 Register InputReg = getRegForValue(Op); in fastLowerIntrinsicCall() local
2601 if (InputReg == 0) in fastLowerIntrinsicCall()
2626 InputReg = fastEmitInst_ri(Opc, RC, InputReg, 4); in fastLowerIntrinsicCall()
2633 .addReg(InputReg, RegState::Kill); in fastLowerIntrinsicCall()
2641 InputReg = fastEmit_r(MVT::i16, MVT::i32, ISD::ZERO_EXTEND, InputReg); in fastLowerIntrinsicCall()
2644 InputReg = fastEmit_r(MVT::i32, MVT::v4i32, ISD::SCALAR_TO_VECTOR, in fastLowerIntrinsicCall()
[all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/ |
| H A D | TargetInstrInfo.h | 528 RegSubRegPairAndIdx &InputReg) const;
1238 RegSubRegPairAndIdx &InputReg) const { in getExtractSubregLikeInputs() argument
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | FastISel.cpp | 1374 Register InputReg = getRegForValue(I->getOperand(0)); in selectCast() local
1375 if (!InputReg) in selectCast()
1380 Opcode, InputReg); in selectCast()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.h | 75 RegSubRegPairAndIdx &InputReg) const override;
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| H A D | ARMBaseInstrInfo.cpp | 5365 RegSubRegPairAndIdx &InputReg) const { in getExtractSubregLikeInputs()
5378 InputReg.Reg = MOReg.getReg(); in getExtractSubregLikeInputs()
5379 InputReg.SubReg = MOReg.getSubReg(); in getExtractSubregLikeInputs()
5380 InputReg.SubIdx = DefIdx == 0 ? ARM::ssub_0 : ARM::ssub_1; in getExtractSubregLikeInputs()
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