Searched refs:ImpDef (Results 1 – 10 of 10) sorted by relevance
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| H A D | HexagonMCChecker.cpp | 102 if (const MCPhysReg *ImpDef = MCID.getImplicitDefs()) in init() local
103 for (; *ImpDef; ++ImpDef) { in init()
104 unsigned R = *ImpDef; in init()
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | ScheduleDAGFast.cpp | 435 for (const MCPhysReg *ImpDef = MCID.getImplicitDefs(); *ImpDef; ++ImpDef) { in getPhysicalRegisterVT() local
436 if (Reg == *ImpDef) in getPhysicalRegisterVT()
|
| H A D | ScheduleDAGRRList.cpp | 1286 for (const MCPhysReg *ImpDef = MCID.getImplicitDefs(); *ImpDef; ++ImpDef) { in getPhysicalRegisterVT() local
1287 if (Reg == *ImpDef) in getPhysicalRegisterVT()
2862 for (const MCPhysReg *ImpDef = ImpDefs; *ImpDef; ++ImpDef) in canClobberReachingPhysRegUse() local
2866 if (TRI->regsOverlap(*ImpDef, SuccPred.getReg()) && in canClobberReachingPhysRegUse()
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
| H A D | RenameIndependentSubregs.cpp | 333 MachineInstrBuilder ImpDef = BuildMI(*PredMBB, InsertPos, in computeMainRangesFixFlags() local
335 SlotIndex DefIdx = LIS->InsertMachineInstrInMaps(*ImpDef); in computeMainRangesFixFlags()
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.cpp | 3220 if (const MCPhysReg *ImpDef = MI.getDesc().getImplicitDefs()) { in modifiesModeRegister() local
3221 for (; ImpDef && *ImpDef; ++ImpDef) { in modifiesModeRegister()
3222 if (*ImpDef == AMDGPU::MODE) in modifiesModeRegister()
5113 bool ImpDef = Def->isImplicitDef(); in legalizeGenericOperand() local
5114 while (!ImpDef && Def && Def->isCopy()) { in legalizeGenericOperand()
5118 ImpDef = Def && Def->isImplicitDef(); in legalizeGenericOperand()
5121 !ImpDef) in legalizeGenericOperand()
|
| H A D | AMDGPUISelDAGToDAG.cpp | 686 MachineSDNode *ImpDef = CurDAG->getMachineNode(TargetOpcode::IMPLICIT_DEF, in SelectBuildVector() local
691 RegSeqArgs[1 + (2 * i)] = SDValue(ImpDef, 0); in SelectBuildVector()
|
| H A D | SIISelLowering.cpp | 11213 SDValue ImpDef = DAG.getCopyToReg(DAG.getEntryNode(), SDLoc(Node), in PostISelFolding() local
11238 Ops.push_back(ImpDef.getValue(1)); in PostISelFolding()
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | ARMLoadStoreOptimizer.cpp | 957 for (unsigned ImpDef : ImpDefs) in MergeOpsUpdate() local
958 MIB.addReg(ImpDef, RegState::ImplicitDefine); in MergeOpsUpdate()
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/ |
| H A D | LegalizerHelper.cpp | 1308 Register ImpDef = MIRBuilder.buildUndef(OldTy).getReg(0); in moreElementsVectorSrc() local
1310 Parts.push_back(ImpDef); in moreElementsVectorSrc()
1318 Register ImpDef = MIRBuilder.buildUndef(MoreTy).getReg(0); in moreElementsVectorSrc() local
1319 MIRBuilder.buildInsert(MoreReg, ImpDef, MO.getReg(), 0); in moreElementsVectorSrc()
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelDAGToDAG.cpp | 984 SDValue ImpDef = SDValue( in Widen() local
987 TargetOpcode::INSERT_SUBREG, dl, MVT::i64, ImpDef, N, SubReg); in Widen()
|