| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86EvexToVex.cpp | 178 int64_t ImmVal = Imm.getImm(); in performCustomAdjustments() local 180 Imm.setImm(0x20 | ((ImmVal & 2) << 3) | (ImmVal & 1)); in performCustomAdjustments() 200 int64_t ImmVal = Imm.getImm(); in performCustomAdjustments() local 202 if ((ImmVal & 0xf) != ImmVal) in performCustomAdjustments()
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| H A D | X86InstrInfo.h | 325 int64_t &ImmVal) const override;
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/VE/ |
| H A D | VEInstrInfo.cpp | 551 int64_t ImmVal; in FoldImmediate() local 562 ImmVal = in FoldImmediate() 564 LLVM_DEBUG(dbgs() << "ImmVal is " << ImmVal << "\n"); in FoldImmediate() 575 ImmVal = DefMI.getOperand(2).getImm() + DefMI.getOperand(3).getImm(); in FoldImmediate() 576 LLVM_DEBUG(dbgs() << "ImmVal is " << ImmVal << "\n"); in FoldImmediate() 681 if (isInt<7>(ImmVal)) { in FoldImmediate() 685 } else if (isMImmVal(ImmVal)) { in FoldImmediate() 688 ImmVal = val2MImm(ImmVal); in FoldImmediate() 695 if (!isInt<7>(ImmVal)) in FoldImmediate() 702 if (!isMImmVal(ImmVal)) in FoldImmediate() [all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/MC/ |
| H A D | MCInst.h | 50 int64_t ImmVal; member 82 return ImmVal; in getImm() 87 ImmVal = Val; in setImm() 144 Op.ImmVal = Val; in createImm()
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| /netbsd-src/external/apache2/llvm/dist/llvm/utils/TableGen/ |
| H A D | PredicateExpander.cpp | 22 int ImmVal, in expandCheckImmOperand() argument 30 OS << (shouldNegate() ? " != " : " == ") << ImmVal; in expandCheckImmOperand() 34 StringRef ImmVal, in expandCheckImmOperand() argument 36 if (ImmVal.empty()) in expandCheckImmOperand() 45 OS << (shouldNegate() ? " != " : " == ") << ImmVal; in expandCheckImmOperand()
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| H A D | PredicateExpander.h | 58 void expandCheckImmOperand(raw_ostream &OS, int OpIndex, int ImmVal, 60 void expandCheckImmOperand(raw_ostream &OS, int OpIndex, StringRef ImmVal,
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| H A D | AsmMatcherEmitter.cpp | 448 int64_t ImmVal; member 478 X.ImmVal = Val; in getImmOp() 1894 int64_t ImmVal = CGA.ResultOperands[AliasOpNo].getImm(); in buildAliasResultOperands() local 1895 ResOperands.push_back(ResOperand::getImmOp(ImmVal)); in buildAliasResultOperands() 2174 int64_t Val = OpInfo.ImmVal; in emitConvertFuncs()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelDAGToDAG.cpp | 3103 const int64_t ImmVal = CNode->getSExtValue(); in SelectSVEAddSubImm() local 3111 Imm = CurDAG->getTargetConstant(ImmVal & 0xFF, DL, MVT::i32); in SelectSVEAddSubImm() 3115 if ((ImmVal & 0xFF) == ImmVal) { in SelectSVEAddSubImm() 3117 Imm = CurDAG->getTargetConstant(ImmVal, DL, MVT::i32); in SelectSVEAddSubImm() 3119 } else if ((ImmVal & 0xFF) == 0) { in SelectSVEAddSubImm() 3120 assert((ImmVal >= -32768) && (ImmVal <= 32512)); in SelectSVEAddSubImm() 3122 Imm = CurDAG->getTargetConstant((ImmVal >> 8) & 0xFF, DL, MVT::i32); in SelectSVEAddSubImm() 3129 if ((ImmVal & 0xFF) == ImmVal) { in SelectSVEAddSubImm() 3131 Imm = CurDAG->getTargetConstant(ImmVal, DL, MVT::i32); in SelectSVEAddSubImm() 3133 } else if ((ImmVal & 0xFF00) == ImmVal) { in SelectSVEAddSubImm() [all …]
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| H A D | AArch64TargetTransformInfo.cpp | 72 APInt ImmVal = Imm; in getIntImmCost() local 74 ImmVal = Imm.sext((BitSize + 63) & ~0x3fU); in getIntImmCost() 80 APInt Tmp = ImmVal.ashr(ShiftVal).sextOrTrunc(64); in getIntImmCost()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
| H A D | HexagonConstExtenders.cpp | 343 int64_t ImmVal; // MO_Immediate, MO_TargetIndex, member 351 return Kind == ER.Kind && V.ImmVal == ER.V.ImmVal; in operator ==() 511 OS << "imm:" << ER.V.ImmVal; in operator <<() 526 OS << "tgi:" << ER.V.ImmVal; in operator <<() 529 OS << "cpi:" << ER.V.ImmVal; in operator <<() 532 OS << "jti:" << ER.V.ImmVal; in operator <<() 535 OS << "???:" << ER.V.ImmVal; in operator <<() 697 V.ImmVal = 0; in ExtRoot() 709 V.ImmVal = Op.getIndex(); in ExtRoot() 725 return V.ImmVal < ER.V.ImmVal; in operator <() [all …]
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| H A D | HexagonHardwareLoops.cpp | 327 unsigned ImmVal; member 337 Contents.ImmVal = v; in CountValue() 356 return Contents.ImmVal; in getImm() 361 if (isImm()) { OS << Contents.ImmVal; } in print()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/AsmParser/ |
| H A D | AArch64AsmParser.cpp | 159 bool parseSymbolicImmVal(const MCExpr *&ImmVal); 2449 const MCExpr *ImmVal; in tryParsePrefetch() local 2450 if (getParser().parseExpression(ImmVal)) in tryParsePrefetch() 2453 const MCConstantExpr *MCE = dyn_cast<MCConstantExpr>(ImmVal); in tryParsePrefetch() 2870 const MCExpr *ImmVal; in tryParseOptionalShiftExtend() local 2871 if (getParser().parseExpression(ImmVal)) in tryParseOptionalShiftExtend() 2874 const MCConstantExpr *MCE = dyn_cast<MCConstantExpr>(ImmVal); in tryParseOptionalShiftExtend() 3080 const MCExpr *ImmVal; in tryParseBarrierOperand() local 3083 if (getParser().parseExpression(ImmVal)) in tryParseBarrierOperand() 3085 const MCConstantExpr *MCE = dyn_cast<MCConstantExpr>(ImmVal); in tryParseBarrierOperand() [all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/ |
| H A D | MachineOperand.h | 173 int64_t ImmVal; // For MO_Immediate. member 539 return Contents.ImmVal; in getImm() 657 Contents.ImmVal = immVal; in setImm() 733 void ChangeToImmediate(int64_t ImmVal, unsigned TargetFlags = 0);
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/AsmParser/ |
| H A D | PPCAsmParser.cpp | 1721 int64_t ImmVal; in validateTargetOperandClass() local 1723 case MCK_0: ImmVal = 0; break; in validateTargetOperandClass() 1724 case MCK_1: ImmVal = 1; break; in validateTargetOperandClass() 1725 case MCK_2: ImmVal = 2; break; in validateTargetOperandClass() 1726 case MCK_3: ImmVal = 3; break; in validateTargetOperandClass() 1727 case MCK_4: ImmVal = 4; break; in validateTargetOperandClass() 1728 case MCK_5: ImmVal = 5; break; in validateTargetOperandClass() 1729 case MCK_6: ImmVal = 6; break; in validateTargetOperandClass() 1730 case MCK_7: ImmVal = 7; break; in validateTargetOperandClass() 1735 if (Op.isImm() && Op.getImm() == ImmVal) in validateTargetOperandClass()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
| H A D | ImplicitNullChecks.cpp | 420 int64_t ImmVal; in isSuitableMemoryOp() local 421 if (!TII->getConstValDefinedInReg(*ModifyingMI, RegUsedInAddr, ImmVal)) in isSuitableMemoryOp() 426 APInt ImmValC(RegSizeInBits, ImmVal, true /*IsSigned*/); in isSuitableMemoryOp()
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| H A D | MachineOperand.cpp | 156 void MachineOperand::ChangeToImmediate(int64_t ImmVal, unsigned TargetFlags) { in ChangeToImmediate() argument 162 Contents.ImmVal = ImmVal; in ChangeToImmediate()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64MCCodeEmitter.cpp | 216 uint32_t ImmVal = 0; in getLdStUImm12OpValue() local 219 ImmVal = static_cast<uint32_t>(MO.getImm()); in getLdStUImm12OpValue() 227 return ImmVal; in getLdStUImm12OpValue()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Sparc/AsmParser/ |
| H A D | SparcAsmParser.cpp | 855 int64_t ImmVal = 0; in parseMembarTag() local 859 if (!Mask->isImm() || !Mask->getImm()->evaluateAsAbsolute(ImmVal) || in parseMembarTag() 860 ImmVal < 0 || ImmVal > 127) { in parseMembarTag() 886 ImmVal |= MaskVal; in parseMembarTag() 892 EVal = MCConstantExpr::create(ImmVal, getContext()); in parseMembarTag()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.cpp | 3312 uint32_t ImmVal = (uint32_t)DefMI.getOperand(1).getImm(); in FoldImmediate() local 3335 if (ARM_AM::isSOImmTwoPartVal(ImmVal)) in FoldImmediate() 3337 else if (ARM_AM::isSOImmTwoPartVal(-ImmVal)) { in FoldImmediate() 3338 ImmVal = -ImmVal; in FoldImmediate() 3342 SOImmValV1 = (uint32_t)ARM_AM::getSOImmTwoPartFirst(ImmVal); in FoldImmediate() 3343 SOImmValV2 = (uint32_t)ARM_AM::getSOImmTwoPartSecond(ImmVal); in FoldImmediate() 3347 if (!ARM_AM::isSOImmTwoPartVal(ImmVal)) in FoldImmediate() 3349 SOImmValV1 = (uint32_t)ARM_AM::getSOImmTwoPartFirst(ImmVal); in FoldImmediate() 3350 SOImmValV2 = (uint32_t)ARM_AM::getSOImmTwoPartSecond(ImmVal); in FoldImmediate() 3367 if (ARM_AM::isT2SOImmTwoPartVal(ImmVal)) in FoldImmediate() [all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 1676 Optional<int64_t> ImmVal = getVectorSHLImm(Ty, Src2Reg, MRI); in selectVectorSHL() local 1680 Opc = ImmVal ? AArch64::SHLv2i64_shift : AArch64::USHLv2i64; in selectVectorSHL() 1682 Opc = ImmVal ? AArch64::SHLv4i32_shift : AArch64::USHLv4i32; in selectVectorSHL() 1684 Opc = ImmVal ? AArch64::SHLv2i32_shift : AArch64::USHLv2i32; in selectVectorSHL() 1686 Opc = ImmVal ? AArch64::SHLv4i16_shift : AArch64::USHLv4i16; in selectVectorSHL() 1688 Opc = ImmVal ? AArch64::SHLv8i16_shift : AArch64::USHLv8i16; in selectVectorSHL() 1690 Opc = ImmVal ? AArch64::SHLv16i8_shift : AArch64::USHLv16i8; in selectVectorSHL() 1692 Opc = ImmVal ? AArch64::SHLv8i8_shift : AArch64::USHLv8i8; in selectVectorSHL() 1699 if (ImmVal) in selectVectorSHL() 1700 Shl.addImm(*ImmVal); in selectVectorSHL() [all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/Disassembler/ |
| H A D | AArch64Disassembler.cpp | 845 int64_t ImmVal = Imm; in DecodePCRelLabel19() local 850 if (ImmVal & (1 << (19 - 1))) in DecodePCRelLabel19() 851 ImmVal |= ~((1LL << 19) - 1); in DecodePCRelLabel19() 853 if (!Dis->tryAddingSymbolicOperand(Inst, ImmVal * 4, Addr, in DecodePCRelLabel19() 855 Inst.addOperand(MCOperand::createImm(ImmVal)); in DecodePCRelLabel19() 1754 unsigned ImmVal = Imm & 0xFFF; in DecodeAddSubImmShift() local 1776 Inst.addOperand(MCOperand::createImm(ImmVal)); in DecodeAddSubImmShift()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/AsmParser/ |
| H A D | AMDGPUAsmParser.cpp | 2047 uint64_t ImmVal = FPLiteral.bitcastToAPInt().getZExtValue(); in addLiteralImmOperand() local 2048 Inst.addOperand(MCOperand::createImm(ImmVal)); in addLiteralImmOperand() 6117 int64_t ImmVal = 0; in parseHwreg() local 6126 ImmVal = encodeHwreg(HwReg.Id, Offset.Id, Width.Id); in parseHwreg() 6130 } else if (parseExpr(ImmVal, "a hwreg macro")) { in parseHwreg() 6131 if (ImmVal < 0 || !isUInt<16>(ImmVal)) { in parseHwreg() 6139 Operands.push_back(AMDGPUOperand::CreateImm(this, ImmVal, Loc, AMDGPUOperand::ImmTyHwreg)); in parseHwreg() 6228 int64_t ImmVal = 0; in parseSendMsgOp() local 6237 ImmVal = encodeMsg(Msg.Id, Op.Id, Stream.Id); in parseSendMsgOp() 6241 } else if (parseExpr(ImmVal, "a sendmsg macro")) { in parseSendMsgOp() [all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/Target/ |
| H A D | TargetInstrPredicate.td | 139 int ImmVal = Imm; 146 string ImmVal = Value;
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelDAGToDAG.cpp | 1422 int64_t ImmVal = SignExtend64(C->getSExtValue(), Width); in selectRVVSimm5() local 1424 if (!isInt<5>(ImmVal)) in selectRVVSimm5() 1427 Imm = CurDAG->getTargetConstant(ImmVal, SDLoc(N), Subtarget->getXLenVT()); in selectRVVSimm5()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AVR/ |
| H A D | AVRExpandPseudoInsts.cpp | 78 bool isLogicImmOpRedundant(unsigned Op, unsigned ImmVal) const; 208 isLogicImmOpRedundant(unsigned Op, unsigned ImmVal) const { in isLogicImmOpRedundant() 211 if (Op == AVR::ANDIRdK && ImmVal == 0xff) in isLogicImmOpRedundant() 215 if (Op == AVR::ORIRdK && ImmVal == 0x0) in isLogicImmOpRedundant()
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