| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
| H A D | PPCFastISel.cpp | 2213 unsigned ImmReg = createResultReg(&PPC::CRBITRCRegClass); in PPCMaterializeInt() local 2215 TII.get(CI->isZero() ? PPC::CRUNSET : PPC::CRSET), ImmReg); in PPCMaterializeInt() 2216 return ImmReg; in PPCMaterializeInt() 2233 unsigned ImmReg = createResultReg(RC); in PPCMaterializeInt() local 2234 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc), ImmReg) in PPCMaterializeInt() 2236 return ImmReg; in PPCMaterializeInt() 2395 unsigned ImmReg = createResultReg(&PPC::CRBITRCRegClass); in fastEmit_i() local 2397 TII.get(Imm == 0 ? PPC::CRUNSET : PPC::CRSET), ImmReg); in fastEmit_i() 2398 return ImmReg; in fastEmit_i()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | R600ISelLowering.cpp | 2064 unsigned ImmReg = R600::ALU_LITERAL_X; in FoldOperand() local 2071 ImmReg = R600::ZERO; in FoldOperand() 2073 ImmReg = R600::HALF; in FoldOperand() 2075 ImmReg = R600::ONE; in FoldOperand() 2083 ImmReg = R600::ZERO; in FoldOperand() 2085 ImmReg = R600::ONE_INT; in FoldOperand() 2094 if (ImmReg == R600::ALU_LITERAL_X) { in FoldOperand() 2102 Src = DAG.getRegister(ImmReg, MVT::i32); in FoldOperand()
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| H A D | SILoadStoreOptimizer.cpp | 1087 Register ImmReg = MRI->createVirtualRegister(&AMDGPU::SReg_32RegClass); in mergeRead2Pair() local 1088 BuildMI(*MBB, Paired.I, DL, TII->get(AMDGPU::S_MOV_B32), ImmReg) in mergeRead2Pair() 1095 .addReg(ImmReg) in mergeRead2Pair() 1181 Register ImmReg = MRI->createVirtualRegister(&AMDGPU::SReg_32RegClass); in mergeWrite2Pair() local 1182 BuildMI(*MBB, Paired.I, DL, TII->get(AMDGPU::S_MOV_B32), ImmReg) in mergeWrite2Pair() 1189 .addReg(ImmReg) in mergeWrite2Pair()
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| H A D | SIInstrInfo.cpp | 6704 Register ImmReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass); in movePackToVALU() local 6709 BuildMI(*MBB, Inst, DL, get(AMDGPU::V_MOV_B32_e32), ImmReg) in movePackToVALU() 6713 .addReg(ImmReg, RegState::Kill) in movePackToVALU() 6723 Register ImmReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass); in movePackToVALU() local 6724 BuildMI(*MBB, Inst, DL, get(AMDGPU::V_MOV_B32_e32), ImmReg) in movePackToVALU() 6727 .addReg(ImmReg, RegState::Kill) in movePackToVALU() 6733 Register ImmReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass); in movePackToVALU() local 6738 BuildMI(*MBB, Inst, DL, get(AMDGPU::V_MOV_B32_e32), ImmReg) in movePackToVALU() 6742 .addReg(ImmReg, RegState::Kill) in movePackToVALU()
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| H A D | AMDGPUInstructionSelector.cpp | 1896 Register ImmReg = MRI->createVirtualRegister(DstRC); in selectG_TRUNC() local 1911 BuildMI(*MBB, I, DL, TII.get(MovOpc), ImmReg) in selectG_TRUNC() 1915 .addReg(ImmReg); in selectG_TRUNC()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | ARMFastISel.cpp | 465 unsigned ImmReg = createResultReg(RC); in ARMMaterializeInt() local 467 TII.get(Opc), ImmReg) in ARMMaterializeInt() 469 return ImmReg; in ARMMaterializeInt() 481 unsigned ImmReg = createResultReg(RC); in ARMMaterializeInt() local 483 TII.get(Opc), ImmReg) in ARMMaterializeInt() 485 return ImmReg; in ARMMaterializeInt()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/AsmParser/ |
| H A D | MipsAsmParser.cpp | 4601 unsigned ImmReg = DstReg; in expandSgeImm() local 4606 ImmReg = ATReg; in expandSgeImm() 4609 if (loadImmediate(ImmValue, ImmReg, Mips::NoRegister, isInt<32>(ImmValue), in expandSgeImm() 4613 TOut.emitRRR(OpRegCode, DstReg, SrcReg, ImmReg, IDLoc, STI); in expandSgeImm() 4631 unsigned ImmReg = DstReg; in expandSgtImm() local 4654 ImmReg = ATReg; in expandSgtImm() 4657 if (loadImmediate(ImmValue, ImmReg, Mips::NoRegister, isInt<32>(ImmValue), in expandSgtImm() 4662 TOut.emitRRR(OpCode, DstReg, ImmReg, SrcReg, IDLoc, STI); in expandSgtImm() 4731 unsigned ImmReg = DstReg; in expandSleImm() local 4736 ImmReg = ATReg; in expandSleImm() [all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
| H A D | HexagonBitSimplify.cpp | 1489 Register ImmReg = genTfrConst(MRI.getRegClass(DR), C, B, At, DL); in processBlock() local 1490 if (ImmReg) { in processBlock() 1491 HBS::replaceReg(DR, ImmReg, MRI); in processBlock() 1492 BT.put(ImmReg, DRC); in processBlock()
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