Home
last modified time | relevance | path

Searched refs:IMM (Results 1 – 25 of 115) sorted by relevance

12345

/netbsd-src/external/gpl3/gcc.old/dist/libgcc/config/m68k/
H A Dlb1sf68.S72 #define IMM(x) CONCAT1 (__IMMEDIATE_PREFIX__, x) macro
354 movew IMM (0),a0@(STICK)
399 cmpw IMM (SINGLE_FLOAT),d6
401 cmpl IMM (SINGLE_FLOAT),d6
422 trap IMM (FPTRAP) | and trap
467 cmpl IMM (0x10000), d1 /* divisor >= 2 ^ 16 ? */
481 L4: lsrl IMM (1), d1 /* shift divisor */
482 lsrl IMM (1), d0 /* shift dividend */
483 cmpl IMM (0x10000), d1 /* still divisor >= 2 ^ 16 ? */
486 andl IMM (0xffff), d0 /* mask out divisor, ignore remainder */
[all …]
/netbsd-src/external/gpl3/gcc/dist/libgcc/config/m68k/
H A Dlb1sf68.S72 #define IMM(x) CONCAT1 (__IMMEDIATE_PREFIX__, x) macro
354 movew IMM (0),a0@(STICK)
399 cmpw IMM (SINGLE_FLOAT),d6
401 cmpl IMM (SINGLE_FLOAT),d6
422 trap IMM (FPTRAP) | and trap
473 cmpl IMM (0x10000), d1 /* divisor >= 2 ^ 16 ? */
487 L4: lsrl IMM (1), d1 /* shift divisor */
488 lsrl IMM (1), d0 /* shift dividend */
489 cmpl IMM (0x10000), d1 /* still divisor >= 2 ^ 16 ? */
492 andl IMM (0xffff), d0 /* mask out divisor, ignore remainder */
[all …]
/netbsd-src/sys/external/bsd/sljit/dist/sljit_src/
H A DsljitNativeMIPS_64.c40 return push_inst(compiler, ORI | SA(0) | TA(dst_ar) | IMM(imm), dst_ar); in load_immediate()
43 return push_inst(compiler, ADDIU | SA(0) | TA(dst_ar) | IMM(imm), dst_ar); in load_immediate()
46 FAIL_IF(push_inst(compiler, LUI | TA(dst_ar) | IMM(imm >> 16), dst_ar)); in load_immediate()
47 …return (imm & 0xffff) ? push_inst(compiler, ORI | SA(dst_ar) | TA(dst_ar) | IMM(imm), dst_ar) : SL… in load_immediate()
81 FAIL_IF(push_inst(compiler, LUI | TA(dst_ar) | IMM(uimm >> 48), dst_ar)); in load_immediate()
83 FAIL_IF(push_inst(compiler, ORI | SA(dst_ar) | TA(dst_ar) | IMM(uimm >> 32), dst_ar)); in load_immediate()
91 …return !(imm & 0xffff) ? SLJIT_SUCCESS : push_inst(compiler, ORI | SA(dst_ar) | TA(dst_ar) | IMM(i… in load_immediate()
116 FAIL_IF(push_inst(compiler, ORI | SA(dst_ar) | TA(dst_ar) | IMM(uimm >> 48), dst_ar)); in load_immediate()
120 …return !(imm & 0xffff) ? SLJIT_SUCCESS : push_inst(compiler, ORI | SA(dst_ar) | TA(dst_ar) | IMM(i… in load_immediate()
129 FAIL_IF(push_inst(compiler, op_imm | S(src1) | TA(EQUAL_FLAG) | IMM(src2), EQUAL_FLAG)); \
[all …]
H A DsljitNativeMIPS_32.c34 return push_inst(compiler, ORI | SA(0) | TA(dst_ar) | IMM(imm), dst_ar); in load_immediate()
37 return push_inst(compiler, ADDIU | SA(0) | TA(dst_ar) | IMM(imm), dst_ar); in load_immediate()
39 FAIL_IF(push_inst(compiler, LUI | TA(dst_ar) | IMM(imm >> 16), dst_ar)); in load_immediate()
40 …return (imm & 0xffff) ? push_inst(compiler, ORI | SA(dst_ar) | TA(dst_ar) | IMM(imm), dst_ar) : SL… in load_immediate()
46 FAIL_IF(push_inst(compiler, op_imm | S(src1) | TA(EQUAL_FLAG) | IMM(src2), EQUAL_FLAG)); \
48 FAIL_IF(push_inst(compiler, op_imm | S(src1) | T(dst) | IMM(src2), DR(dst))); \
98 return push_inst(compiler, ANDI | S(src2) | T(dst) | IMM(0xff), DR(dst)); in emit_single_op()
117 return push_inst(compiler, ANDI | S(src2) | T(dst) | IMM(0xffff), DR(dst)); in emit_single_op()
142 return push_inst(compiler, XORI | SA(EQUAL_FLAG) | TA(EQUAL_FLAG) | IMM(1), EQUAL_FLAG); in emit_single_op()
147 FAIL_IF(push_inst(compiler, BEQ | S(TMP_REG1) | TA(0) | IMM(5), UNMOVABLE_INS)); in emit_single_op()
[all …]
H A DsljitNativePPC_64.c54 return push_inst(compiler, ADDI | D(reg) | A(0) | IMM(imm)); in load_immediate()
57 return push_inst(compiler, ORI | S(TMP_ZERO) | A(reg) | IMM(imm)); in load_immediate()
60 FAIL_IF(push_inst(compiler, ADDIS | D(reg) | A(0) | IMM(imm >> 16))); in load_immediate()
61 return (imm & 0xffff) ? push_inst(compiler, ORI | S(reg) | A(reg) | IMM(imm)) : SLJIT_SUCCESS; in load_immediate()
72 FAIL_IF(push_inst(compiler, ADDI | D(reg) | A(0) | IMM(tmp >> 48))); in load_immediate()
78 FAIL_IF(push_inst(compiler, ADDIS | D(reg) | A(0) | IMM(tmp >> 48))); in load_immediate()
79 FAIL_IF(push_inst(compiler, ORI | S(reg) | A(reg) | IMM(tmp >> 32))); in load_immediate()
89 FAIL_IF(push_inst(compiler, ADDI | D(reg) | A(0) | IMM(tmp >> 48))); in load_immediate()
95 FAIL_IF(push_inst(compiler, ADDI | D(reg) | A(0) | IMM(tmp >> 48))); in load_immediate()
98 return (imm & 0xffff) ? push_inst(compiler, ORI | S(reg) | A(reg) | IMM(tmp2)) : SLJIT_SUCCESS; in load_immediate()
[all …]
H A DsljitNativeSPARC_32.c32 return push_inst(compiler, OR | D(dst) | S1(0) | IMM(imm), DR(dst)); in load_immediate()
38 #define ARG2(flags, src2) ((flags & SRC2_IMM) ? IMM(src2) : S2(src2))
60 return push_inst(compiler, AND | D(dst) | S1(src2) | IMM(0xff), DR(dst)); in emit_single_op()
61 FAIL_IF(push_inst(compiler, SLL | D(dst) | S1(src2) | IMM(24), DR(dst))); in emit_single_op()
62 return push_inst(compiler, SRA | D(dst) | S1(dst) | IMM(24), DR(dst)); in emit_single_op()
72 FAIL_IF(push_inst(compiler, SLL | D(dst) | S1(src2) | IMM(16), DR(dst))); in emit_single_op()
73 …return push_inst(compiler, (op == SLJIT_MOV_S16 ? SRA : SRL) | D(dst) | S1(dst) | IMM(16), DR(dst)… in emit_single_op()
89 …FAIL_IF(push_inst(compiler, OR | (flags & SET_FLAGS) | D(dst) | S1(0) | IMM(32), UNMOVABLE_INS | (… in emit_single_op()
90 FAIL_IF(push_inst(compiler, OR | D(dst) | S1(0) | IMM(-1), DR(dst))); in emit_single_op()
94 FAIL_IF(push_inst(compiler, SLL | D(TMP_REG1) | S1(TMP_REG1) | IMM(1), DR(TMP_REG1))); in emit_single_op()
[all …]
H A DsljitNativePPC_32.c34 return push_inst(compiler, ADDI | D(reg) | A(0) | IMM(imm)); in load_immediate()
37 return push_inst(compiler, ORI | S(TMP_ZERO) | A(reg) | IMM(imm)); in load_immediate()
39 FAIL_IF(push_inst(compiler, ADDIS | D(reg) | A(0) | IMM(imm >> 16))); in load_immediate()
40 return (imm & 0xffff) ? push_inst(compiler, ORI | S(reg) | A(reg) | IMM(imm)) : SLJIT_SUCCESS; in load_immediate()
183 FAIL_IF(push_inst(compiler, ORI | S(src1) | A(dst) | IMM(compiler->imm))); in emit_single_op()
184 return push_inst(compiler, ORIS | S(dst) | A(dst) | IMM(compiler->imm >> 16)); in emit_single_op()
199 FAIL_IF(push_inst(compiler, XORI | S(src1) | A(dst) | IMM(compiler->imm))); in emit_single_op()
200 return push_inst(compiler, XORIS | S(dst) | A(dst) | IMM(compiler->imm >> 16)); in emit_single_op()
235 FAIL_IF(push_inst(compiler, ADDIS | D(reg) | A(0) | IMM(init_value >> 16))); in emit_const()
236 return push_inst(compiler, ORI | S(reg) | A(reg) | IMM(init_value)); in emit_const()
H A DsljitNativeMIPS_common.c86 #define IMM(imm) ((imm) & 0xffff) macro
564 …FAIL_IF(push_inst(compiler, ADDIU_W | S(SLJIT_SP) | T(SLJIT_SP) | IMM(-local_size), DR(SLJIT_SP))); in sljit_emit_enter()
576 FAIL_IF(push_inst(compiler, STACK_STORE | base | TA(RETURN_ADDR_REG) | IMM(offs), MOVABLE_INS)); in sljit_emit_enter()
581 FAIL_IF(push_inst(compiler, STACK_STORE | base | T(i) | IMM(offs), MOVABLE_INS)); in sljit_emit_enter()
586 FAIL_IF(push_inst(compiler, STACK_STORE | base | T(i) | IMM(offs), MOVABLE_INS)); in sljit_emit_enter()
636 …FAIL_IF(push_inst(compiler, STACK_LOAD | base | TA(RETURN_ADDR_REG) | IMM(local_size - (sljit_s32)… in sljit_emit_return()
641 FAIL_IF(push_inst(compiler, STACK_LOAD | base | T(i) | IMM(offs), DR(i))); in sljit_emit_return()
647 FAIL_IF(push_inst(compiler, STACK_LOAD | base | T(i) | IMM(offs), DR(i))); in sljit_emit_return()
655 …return push_inst(compiler, ADDIU_W | S(SLJIT_SP) | T(SLJIT_SP) | IMM(compiler->local_size), UNMOVA… in sljit_emit_return()
712 …| TA(reg_ar) | IMM(argw), ((flags & MEM_MASK) <= GPR_REG && (flags & LOAD_DATA)) ? reg_ar : MOVABL… in getput_arg_fast()
[all …]
H A DsljitNativePPC_common.c127 #define IMM(imm) ((imm) & 0xffff) macro
607 FAIL_IF(push_inst(compiler, STACK_STORE | S(TMP_ZERO) | A(SLJIT_SP) | IMM(offs))); in sljit_emit_enter()
612 FAIL_IF(push_inst(compiler, STACK_STORE | S(i) | A(SLJIT_SP) | IMM(offs))); in sljit_emit_enter()
617 FAIL_IF(push_inst(compiler, STACK_STORE | S(i) | A(SLJIT_SP) | IMM(offs))); in sljit_emit_enter()
623 FAIL_IF(push_inst(compiler, STACK_STORE | S(0) | A(SLJIT_SP) | IMM(2 * sizeof(sljit_sw)))); in sljit_emit_enter()
625 FAIL_IF(push_inst(compiler, STACK_STORE | S(0) | A(SLJIT_SP) | IMM(sizeof(sljit_sw)))); in sljit_emit_enter()
642 FAIL_IF(push_inst(compiler, STWU | S(SLJIT_SP) | A(SLJIT_SP) | IMM(-local_size))); in sljit_emit_enter()
649 FAIL_IF(push_inst(compiler, STDU | S(SLJIT_SP) | A(SLJIT_SP) | IMM(-local_size))); in sljit_emit_enter()
682 FAIL_IF(push_inst(compiler, ADDI | D(SLJIT_SP) | A(SLJIT_SP) | IMM(compiler->local_size))); in sljit_emit_return()
689 FAIL_IF(push_inst(compiler, STACK_LOAD | D(0) | A(SLJIT_SP) | IMM(2 * sizeof(sljit_sw)))); in sljit_emit_return()
[all …]
H A DsljitNativeSPARC_common.c116 #define IMM(imm) (((imm) & 0x1fff) | IMM_ARG) macro
450 FAIL_IF(push_inst(compiler, SAVE | D(SLJIT_SP) | S1(SLJIT_SP) | IMM(-local_size), UNMOVABLE_INS)); in sljit_emit_enter()
484 FAIL_IF(push_inst(compiler, JMPL | D(0) | S1A(31) | IMM(8), UNMOVABLE_INS)); in sljit_emit_return()
538 | S1(arg & REG_MASK) | ((arg & OFFS_REG_MASK) ? S2(OFFS_REG(arg)) : IMM(argw)), in getput_arg_fast()
604 …FAIL_IF(push_inst(compiler, ADD | D(TMP_REG3) | S1(TMP_REG3) | IMM(argw - compiler->cache_argw), D… in getput_arg()
625 …return push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | dest | S1(arg2) | IMM(0), delay… in getput_arg()
805 FAIL_IF(push_inst(compiler, SRA | D(TMP_REG1) | S1(SLJIT_R0) | IMM(31), DR(TMP_REG1))); in sljit_emit_op0()
1225 FAIL_IF(push_inst(compiler, JMPL | D(0) | S1(TMP_LINK) | IMM(8), UNMOVABLE_INS)); in sljit_emit_fast_return()
1344 …ompiler, JMPL | D(type >= SLJIT_FAST_CALL ? TMP_LINK : 0) | S1(TMP_REG2) | IMM(0), UNMOVABLE_INS)); in sljit_emit_jump()
1380 …FAIL_IF(push_inst(compiler, JMPL | D(type >= SLJIT_FAST_CALL ? TMP_LINK : 0) | S1(src_r) | IMM(0),… in sljit_emit_ijump()
[all …]
/netbsd-src/sys/arch/x68k/stand/libiocs/
H A Diocscall.h11 # define IMM \# macro
13 # define IMM # macro
17 moveq IMM n,%d0;\
18 trap IMM 15
41 moveq IMM s,%d1;\
/netbsd-src/external/gpl3/binutils.old/dist/opcodes/
H A Dlm32-opc.c161 { { MNEM, ' ', OP (R1), ',', OP (R0), ',', OP (IMM), 0 } },
251 { { MNEM, ' ', OP (R1), ',', OP (R0), ',', OP (IMM), 0 } },
263 { { MNEM, ' ', OP (R1), ',', OP (R0), ',', OP (IMM), 0 } },
275 { { MNEM, ' ', OP (R1), ',', OP (R0), ',', OP (IMM), 0 } },
311 { { MNEM, ' ', OP (R1), ',', OP (R0), ',', OP (IMM), 0 } },
323 { { MNEM, ' ', OP (R1), ',', '(', OP (R0), '+', OP (IMM), ')', 0 } },
329 { { MNEM, ' ', OP (R1), ',', '(', OP (R0), '+', OP (IMM), ')', 0 } },
335 { { MNEM, ' ', OP (R1), ',', '(', OP (R0), '+', OP (IMM), ')', 0 } },
341 { { MNEM, ' ', OP (R1), ',', '(', OP (R0), '+', OP (IMM), ')', 0 } },
347 { { MNEM, ' ', OP (R1), ',', '(', OP (R0), '+', OP (IMM), ')', 0 } },
[all …]
H A Dlm32-opinst.c53 { INPUT, "imm", HW_H_SINT, CGEN_MODE_INT, OP_ENT (IMM), 0, 0 },
121 { INPUT, "imm", HW_H_SINT, CGEN_MODE_INT, OP_ENT (IMM), 0, 0 },
129 { INPUT, "imm", HW_H_SINT, CGEN_MODE_INT, OP_ENT (IMM), 0, 0 },
137 { INPUT, "imm", HW_H_SINT, CGEN_MODE_INT, OP_ENT (IMM), 0, 0 },
157 { INPUT, "imm", HW_H_SINT, CGEN_MODE_INT, OP_ENT (IMM), 0, 0 },
171 { INPUT, "imm", HW_H_SINT, CGEN_MODE_INT, OP_ENT (IMM), 0, 0 },
179 { INPUT, "imm", HW_H_SINT, CGEN_MODE_INT, OP_ENT (IMM), 0, 0 },
213 { INPUT, "imm", HW_H_SINT, CGEN_MODE_INT, OP_ENT (IMM), 0, 0 },
H A Drx-decode.opc172 #define IMM(sf) immediate (sf, 0, ld)
310 ID(mov); DR(rdst); SC(IMM (1)); F_____;
319 SC(IMM(im));
332 ID(mov); sBWL (sz); DIs(dst, d*16+sppp, sz); SC(IMM(1)); F_____;
426 ID(rtsd); SC(IMM(1) * 4);
429 ID(rtsd); SC(IMM(1) * 4); S2R(rega); DR(regb);
549 ID(sub); SR(rsrc); S2C(IMM(1)); F_OSZC;
915 ID(fadd); DR(rdst); SC(IMM(0)); F__SZ_;
921 ID(fcmp); DR(rdst); SC(IMM(0)); F_OSZ_;
927 ID(fsub); DR(rdst); SC(IMM(0)); F__SZ_;
[all …]
/netbsd-src/external/gpl3/binutils/dist/opcodes/
H A Dlm32-opc.c161 { { MNEM, ' ', OP (R1), ',', OP (R0), ',', OP (IMM), 0 } },
251 { { MNEM, ' ', OP (R1), ',', OP (R0), ',', OP (IMM), 0 } },
263 { { MNEM, ' ', OP (R1), ',', OP (R0), ',', OP (IMM), 0 } },
275 { { MNEM, ' ', OP (R1), ',', OP (R0), ',', OP (IMM), 0 } },
311 { { MNEM, ' ', OP (R1), ',', OP (R0), ',', OP (IMM), 0 } },
323 { { MNEM, ' ', OP (R1), ',', '(', OP (R0), '+', OP (IMM), ')', 0 } },
329 { { MNEM, ' ', OP (R1), ',', '(', OP (R0), '+', OP (IMM), ')', 0 } },
335 { { MNEM, ' ', OP (R1), ',', '(', OP (R0), '+', OP (IMM), ')', 0 } },
341 { { MNEM, ' ', OP (R1), ',', '(', OP (R0), '+', OP (IMM), ')', 0 } },
347 { { MNEM, ' ', OP (R1), ',', '(', OP (R0), '+', OP (IMM), ')', 0 } },
[all …]
H A Dlm32-opinst.c53 { INPUT, "imm", HW_H_SINT, CGEN_MODE_INT, OP_ENT (IMM), 0, 0 },
121 { INPUT, "imm", HW_H_SINT, CGEN_MODE_INT, OP_ENT (IMM), 0, 0 },
129 { INPUT, "imm", HW_H_SINT, CGEN_MODE_INT, OP_ENT (IMM), 0, 0 },
137 { INPUT, "imm", HW_H_SINT, CGEN_MODE_INT, OP_ENT (IMM), 0, 0 },
157 { INPUT, "imm", HW_H_SINT, CGEN_MODE_INT, OP_ENT (IMM), 0, 0 },
171 { INPUT, "imm", HW_H_SINT, CGEN_MODE_INT, OP_ENT (IMM), 0, 0 },
179 { INPUT, "imm", HW_H_SINT, CGEN_MODE_INT, OP_ENT (IMM), 0, 0 },
213 { INPUT, "imm", HW_H_SINT, CGEN_MODE_INT, OP_ENT (IMM), 0, 0 },
H A Drx-decode.opc172 #define IMM(sf) immediate (sf, 0, ld)
310 ID(mov); DR(rdst); SC(IMM (1)); F_____;
319 SC(IMM(im));
332 ID(mov); sBWL (sz); DIs(dst, d*16+sppp, sz); SC(IMM(1)); F_____;
426 ID(rtsd); SC(IMM(1) * 4);
429 ID(rtsd); SC(IMM(1) * 4); S2R(rega); DR(regb);
549 ID(sub); SR(rsrc); S2C(IMM(1)); F_OSZC;
915 ID(fadd); DR(rdst); SC(IMM(0)); F__SZ_;
921 ID(fcmp); DR(rdst); SC(IMM(0)); F_OSZ_;
927 ID(fsub); DR(rdst); SC(IMM(0)); F__SZ_;
[all …]
/netbsd-src/sys/external/bsd/compiler_rt/dist/lib/builtins/arm/
H A Dudivsi3.S116 #define IMM # macro
119 cmp r0, r1, lsl IMM shift; \
121 WIDE(addhs) r3, r3, IMM (1 << shift); \
122 WIDE(subhs) r0, r0, r1, lsl IMM shift
H A Dudivmodsi4.S119 #define IMM # macro
122 cmp r0, r1, lsl IMM shift; \
124 WIDE(addhs) r3, r3, IMM (1 << shift); \
125 WIDE(subhs) r0, r0, r1, lsl IMM shift
H A Dumodsi3.S110 #define IMM # macro
113 cmp r0, r1, lsl IMM shift; \
115 WIDE(subhs) r0, r0, r1, lsl IMM shift
/netbsd-src/external/gpl3/binutils/dist/gas/config/
H A Drx-parse.y98 #define IMM(v,pos) IMM_ (v, pos, 32) macro
290 { B2 (0xf8, 0x02); F ($7, 8, 4); IMM ($4, 12);}
310 { B2 (0xf8, 0x02); F ($8, 8, 4); DSP ($6, 6, LSIZE); IMM ($4, 12); } }
365 { B2 (0x74, 0x00); F ($5, 12, 4); IMM ($3, 6); } }
371 { B2 (0x70, 0); F ($5, 8, 4); F ($5, 12, 4); IMM ($3, 6); } }
377 { B2 (0x74, 0x10); F ($5, 12, 4); IMM ($3, 6); } }
383 { B2 (0x74, 0x20); F ($5, 12, 4); IMM ($3, 6); } }
389 { B2 (0x74, 0x30); F ($5, 12, 4); IMM ($3, 6); } }
397 { B2 (0xfb, 0x02); F ($6, 8, 4); IMM ($4, 12); } }
405 { B2 (0xfb, 0x02); F ($5, 8, 4); IMM ($3, 12); } }
[all …]
/netbsd-src/external/gpl3/binutils.old/dist/gas/config/
H A Drx-parse.y98 #define IMM(v,pos) IMM_ (v, pos, 32) macro
290 { B2 (0xf8, 0x02); F ($7, 8, 4); IMM ($4, 12);}
310 { B2 (0xf8, 0x02); F ($8, 8, 4); DSP ($6, 6, LSIZE); IMM ($4, 12); } }
365 { B2 (0x74, 0x00); F ($5, 12, 4); IMM ($3, 6); } }
371 { B2 (0x70, 0); F ($5, 8, 4); F ($5, 12, 4); IMM ($3, 6); } }
377 { B2 (0x74, 0x10); F ($5, 12, 4); IMM ($3, 6); } }
383 { B2 (0x74, 0x20); F ($5, 12, 4); IMM ($3, 6); } }
389 { B2 (0x74, 0x30); F ($5, 12, 4); IMM ($3, 6); } }
397 { B2 (0xfb, 0x02); F ($6, 8, 4); IMM ($4, 12); } }
405 { B2 (0xfb, 0x02); F ($5, 8, 4); IMM ($3, 12); } }
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/CSKY/
H A DCSKYInstrFormats.td72 // Format< OP[6] | RZ[5] | RX[5] | IMM[16] >
86 // Format< OP[6] | SOP[5] | RZ[5] | IMM[16] >
136 // Format< OP[6] | SOP[5] | RX[5] | 00000000000000[14] | IMM[2] >
202 // Format< OP[6] | RZ[5] | RX[5] | SOP[4] | IMM[12] >
254 // Format< OP[6] | RZ[5] | RX[5] | SOP[6] | PCODE[5] | IMM[5]>
272 // Format< OP[6] | IMM[5] | RX[5] | SOP[6] | PCODE[5] | RZ[5]>
289 // Format< OP[6] | RY[5] | RX[5] | SOP[6] | PCODE[5] | IMM[5]>
344 // Format< OP[6] | IMM[5] | RX[5] | SOP[6] | PCODE[5] | 00000 >
361 // Format< OP[6] | IMM[5] | 00000[5] | SOP[6] | PCODE[5] | RZ[5]>
/netbsd-src/sys/external/isc/libsodium/dist/src/libsodium/crypto_stream/chacha20/dolbeau/
H A Du4.h2 #define VEC4_ROT(A, IMM) \ argument
3 _mm_or_si128(_mm_slli_epi32(A, IMM), _mm_srli_epi32(A, (32 - IMM)))
/netbsd-src/sys/arch/powerpc/powerpc/
H A Ddb_disasm.c877 u_int IMM; in disasm_fields() local
879 IMM = extract_field(instr, 31 - 31, 16); in disasm_fields()
880 if (IMM & 0x8000) { in disasm_fields()
882 IMM = 0x10000-IMM; in disasm_fields()
887 IMM = extract_field(instr, 31 - 31, 16); in disasm_fields()
891 db_printf("0x%x", IMM); in disasm_fields()

12345