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Searched refs:GroupSize (Results 1 – 8 of 8) sorted by relevance

/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
H A DAMDGPULowerKernelAttributes.cpp161 Value *GroupSize = WorkGroupSizes[I]; in processUse() local
163 if (!GroupSize || !GridSize) in processUse()
166 for (User *U : GroupSize->users()) { in processUse()
212 Value *GroupSize = WorkGroupSizes[I]; in processUse() local
213 if (!GroupSize) in processUse()
217 GroupSize->replaceAllUsesWith( in processUse()
219 GroupSize->getType(), in processUse()
H A DSIMachineScheduler.cpp657 unsigned GroupSize; in colorHighLatenciesGroups() local
672 GroupSize = 2; in colorHighLatenciesGroups()
674 GroupSize = 3; in colorHighLatenciesGroups()
676 GroupSize = 4; in colorHighLatenciesGroups()
767 } else if (Count == GroupSize) { in colorHighLatenciesGroups()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/
H A DX86InterleavedAccess.cpp458 int GroupSize = std::ceil((VF - FirstGroupElement) / 3.0); in setGroupSize() local
459 SizeInfo.push_back(GroupSize); in setGroupSize()
460 FirstGroupElement = ((GroupSize)*3 + FirstGroupElement) % VF; in setGroupSize()
559 SmallVector<int, 3> GroupSize; in deinterleave8bitStride3() local
565 setGroupSize(VT, GroupSize); in deinterleave8bitStride3()
568 DecodePALIGNRMask(VT, GroupSize[2 - i], VPAlign[i], false); in deinterleave8bitStride3()
570 DecodePALIGNRMask(VT, GroupSize[2] + GroupSize[1], VPAlign2, true, true); in deinterleave8bitStride3()
571 DecodePALIGNRMask(VT, GroupSize[1], VPAlign3, true, true); in deinterleave8bitStride3()
638 SmallVector<int, 3> GroupSize; in interleave8bitStride3() local
647 setGroupSize(VT, GroupSize); in interleave8bitStride3()
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/netbsd-src/external/apache2/llvm/dist/llvm/tools/llvm-pdbutil/
H A DFormatUtil.cpp74 uint32_t IndentLevel, uint32_t GroupSize, in typesetItemList() argument
79 ThisGroup = Opts.take_front(GroupSize); in typesetItemList()
H A DFormatUtil.h61 uint32_t GroupSize, StringRef Sep);
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/MCTargetDesc/
H A DAMDGPUInstPrinter.cpp1364 uint16_t GroupSize = BITMASK_MAX - AndMask + 1; in printSwizzle() local
1365 if (GroupSize > 1 && in printSwizzle()
1366 isPowerOf2_64(GroupSize) && in printSwizzle()
1367 OrMask < GroupSize && in printSwizzle()
1372 O << formatDec(GroupSize); in printSwizzle()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/
H A DRegAllocGreedy.cpp1304 const unsigned GroupSize = 8; in addThroughConstraints() local
1305 SpillPlacement::BlockConstraint BCS[GroupSize]; in addThroughConstraints()
1306 unsigned TBS[GroupSize]; in addThroughConstraints()
1313 assert(T < GroupSize && "Array overflow"); in addThroughConstraints()
1315 if (++T == GroupSize) { in addThroughConstraints()
1322 assert(B < GroupSize && "Array overflow"); in addThroughConstraints()
1344 if (++B == GroupSize) { in addThroughConstraints()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/AsmParser/
H A DAMDGPUAsmParser.cpp6642 int64_t GroupSize; in parseSwizzleBroadcast() local
6645 if (!parseSwizzleOperand(GroupSize, in parseSwizzleBroadcast()
6651 if (!isPowerOf2_64(GroupSize)) { in parseSwizzleBroadcast()
6656 0, GroupSize - 1, in parseSwizzleBroadcast()
6659 Imm = encodeBitmaskPerm(BITMASK_MAX - GroupSize + 1, LaneIdx, 0); in parseSwizzleBroadcast()
6670 int64_t GroupSize; in parseSwizzleReverse() local
6672 if (!parseSwizzleOperand(GroupSize, in parseSwizzleReverse()
6678 if (!isPowerOf2_64(GroupSize)) { in parseSwizzleReverse()
6683 Imm = encodeBitmaskPerm(BITMASK_MAX, 0, GroupSize - 1); in parseSwizzleReverse()
6692 int64_t GroupSize; in parseSwizzleSwap() local
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