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Searched refs:FPR64 (Results 1 – 14 of 14) sorted by relevance

/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/
H A DRISCVInstrInfoD.td34 : RVInstR4Frm<0b01, opcode, (outs FPR64:$rd),
35 (ins FPR64:$rs1, FPR64:$rs2, FPR64:$rs3, frmarg:$funct3),
40 (Inst FPR64:$rd, FPR64:$rs1, FPR64:$rs2, FPR64:$rs3, 0b111)>;
44 : RVInstR<funct7, funct3, OPC_OP_FP, (outs FPR64:$rd),
45 (ins FPR64:$rs1, FPR64:$rs2), opcodestr, "$rd, $rs1, $rs2">;
49 : RVInstRFrm<funct7, OPC_OP_FP, (outs FPR64:$rd),
50 (ins FPR64:$rs1, FPR64:$rs2, frmarg:$funct3), opcodestr,
55 (Inst FPR64:$rd, FPR64:$rs1, FPR64:$rs2, 0b111)>;
60 (ins FPR64:$rs1, FPR64:$rs2), opcodestr, "$rd, $rs1, $rs2">,
70 def FLD : RVInstI<0b011, OPC_LOAD_FP, (outs FPR64:$rd),
[all …]
H A DRISCVInstrInfoZfh.td210 def FCVT_H_D : FPUnaryOp_r_frm<0b0100010, FPR16, FPR64, "fcvt.h.d">,
214 def : FPUnaryOpDynFrmAlias<FCVT_H_D, "fcvt.h.d", FPR16, FPR64>;
216 def FCVT_D_H : FPUnaryOp_r<0b0100001, 0b000, FPR64, FPR16, "fcvt.d.h">,
368 def : Pat<(fpround FPR64:$rs1), (FCVT_H_D FPR64:$rs1, 0b111)>;
372 def : Pat<(fcopysign FPR16:$rs1, FPR64:$rs2),
374 def : Pat<(fcopysign FPR64:$rs1, FPR16:$rs2), (FSGNJ_D $rs1, (FCVT_D_H $rs2))>;
H A DRISCVInstrInfoC.td489 def C_FLDSP : CStackLoad<0b001, "c.fldsp", FPR64, uimm9_lsb000>,
549 def C_FSDSP : CStackStore<0b101, "c.fsdsp", FPR64, uimm9_lsb000>,
882 def : CompressPat<(FLD FPR64:$rd, SP:$rs1, uimm9_lsb000:$imm),
883 (C_FLDSP FPR64:$rd, SP:$rs1, uimm9_lsb000:$imm)>;
924 def : CompressPat<(FSD FPR64:$rs2, SP:$rs1, uimm9_lsb000:$imm),
925 (C_FSDSP FPR64:$rs2, SP:$rs1, uimm9_lsb000:$imm)>;
H A DRISCVRegisterInfo.td258 def FPR64 : RegisterClass<"RISCV", [f64], 64, (add
H A DRISCVInstrInfoVPseudos.td81 def SCALAR_F64 : FPR_Info<FPR64, "F64">;
218 def VF64M1: VTypeInfo<vfloat64m1_t, vbool64_t, 64, VR, V_M1, f64, FPR64>;
237 VRM2, V_M2, f64, FPR64>;
239 VRM4, V_M4, f64, FPR64>;
241 VRM8, V_M8, f64, FPR64>;
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
H A DAArch64InstrInfo.td1217 def FJCVTZS : BaseFPToIntegerUnscaled<0b01, 0b11, 0b110, FPR64, GPR32,
1220 (int_aarch64_fjcvtzs FPR64:$Rn))]> {
1462 (COPY_TO_REGCLASS (MOVi64imm (bitcast_fpimm_to_i64 f64:$in)), FPR64)>;
2467 // Match all load 64 bits width whose type is compatible with FPR64
2624 // Match all load 64 bits width whose type is compatible with FPR64
2813 // Match all load 64 bits width whose type is compatible with FPR64
3154 // Match all store 64 bits width whose type is compatible with FPR64
3157 defm : VecROStorePat<ro64, v2i32, FPR64, STRDroW, STRDroX>;
3158 defm : VecROStorePat<ro64, v2f32, FPR64, STRDroW, STRDroX>;
3159 defm : VecROStorePat<ro64, v4i16, FPR64, STRDroW, STRDroX>;
[all …]
H A DAArch64InstrFormats.td4551 def UWDr : BaseFPToIntegerUnscaled<0b01, rmode, opcode, FPR64, GPR32, asm,
4552 [(set GPR32:$Rd, (OpN (f64 FPR64:$Rn)))]> {
4557 def UXDr : BaseFPToIntegerUnscaled<0b01, rmode, opcode, FPR64, GPR64, asm,
4558 [(set GPR64:$Rd, (OpN (f64 FPR64:$Rn)))]> {
4602 def SWDri : BaseFPToInteger<0b01, rmode, opcode, FPR64, GPR32,
4604 [(set GPR32:$Rd, (OpN (fmul FPR64:$Rn,
4611 def SXDri : BaseFPToInteger<0b01, rmode, opcode, FPR64, GPR64,
4613 [(set GPR64:$Rd, (OpN (fmul FPR64:$Rn,
4671 def UWDri: BaseIntegerToFPUnscaled<isUnsigned, GPR32, FPR64, f64, asm, node> {
4687 def UXDri: BaseIntegerToFPUnscaled<isUnsigned, GPR64, FPR64, f64, asm, node> {
[all …]
H A DAArch64RegisterInfo.td436 def FPR64 : RegisterClass<"AArch64", [f64, i64, v2f32, v1f64, v8i8, v4i16, v2i32,
442 64, (trunc FPR64, 16)>;
460 def DSeqPairs : RegisterTuples<[dsub0, dsub1], [(rotl FPR64, 0), (rotl FPR64, 1)]>;
462 [(rotl FPR64, 0), (rotl FPR64, 1),
463 (rotl FPR64, 2)]>;
465 [(rotl FPR64, 0), (rotl FPR64, 1),
466 (rotl FPR64, 2), (rotl FPR64, 3)]>;
507 def V64 : RegisterOperand<FPR64, "printVRegOperand"> {
640 defm VecListOne : VectorList<1, FPR64, FPR128>;
668 def FPR64Op : RegisterOperand<FPR64, "printOperand"> {
[all …]
H A DAArch64InstrGISel.td245 def : Pat<(f32 (fadd (vector_extract (v2f32 FPR64:$Rn), (i64 0)),
246 (vector_extract (v2f32 FPR64:$Rn), (i64 1)))),
247 (f32 (FADDPv2i32p (v2f32 FPR64:$Rn)))>;
H A DAArch64FrameLowering.cpp2216 enum RegType { GPR, FPR64, FPR128, PPR, ZPR } Type; enumerator
2227 case FPR64: in getScale()
2286 RPI.Type = RegPairInfo::FPR64; in computeCalleeSaveRegisterPairs()
2307 case RegPairInfo::FPR64: in computeCalleeSaveRegisterPairs()
2530 case RegPairInfo::FPR64: in spillCalleeSavedRegisters()
2636 case RegPairInfo::FPR64: in restoreCalleeSavedRegisters()
H A DAArch64SVEInstrInfo.td563 def : Pat<(nxv2f64 (AArch64dup (f64 FPR64:$src))),
564 (DUP_ZZI_D (INSERT_SUBREG (IMPLICIT_DEF), FPR64:$src, dsub), 0)>;
2199 def : Pat<(nxv2i64 (vector_insert (nxv2i64 (undef)), (i64 FPR64:$src), 0)),
2200 (INSERT_SUBREG (nxv2i64 (IMPLICIT_DEF)), FPR64:$src, dsub)>;
2212 def : Pat<(nxv2f64 (vector_insert (nxv2f64 (undef)), (f64 FPR64:$src), 0)),
2213 (INSERT_SUBREG (nxv2f64 (IMPLICIT_DEF)), FPR64:$src, dsub)>;
2229 def : Pat<(nxv2f64 (vector_insert (nxv2f64 ZPR:$vec), (f64 FPR64:$src), 0)),
2230 (SEL_ZPZZ_D (PTRUE_D 1), (INSERT_SUBREG (IMPLICIT_DEF), FPR64:$src, dsub), ZPR:$vec)>;
2271 def : Pat<(nxv2f64 (vector_insert (nxv2f64 ZPR:$vec), (f64 FPR64:$src), GPR64:$index)),
H A DSVEInstrFormats.td5957 def _D : sve_int_perm_clast_vz<0b11, ab, asm, ZPR64, FPR64>;
6061 def _D : sve_int_perm_last_v<0b11, ab, asm, ZPR64, FPR64>;
6263 def _D : sve_int_perm_cpy_v<0b11, asm, ZPR64, FPR64>;
6272 (!cast<Instruction>(NAME # _D) ZPR64:$Zd, PPR3bAny:$Pg, FPR64:$Vn), 1>;
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/
H A DSystemZRegisterInfo.td210 class FPR64<bits<16> num, string n, FPR32 high>
217 class FPR128<bits<16> num, string n, FPR64 low, FPR64 high>
227 def F#I#D : FPR64<I, "f"#I, !cast<FPR32>("F"#I#"S")>,
232 def F#I#D : FPR64<I, "v"#I, !cast<FPR32>("F"#I#"S")>,
237 def F#I#Q : FPR128<I, "f"#I, !cast<FPR64>("F"#!add(I, 2)#"D"),
238 !cast<FPR64>("F"#I#"D")>;
252 // A full 128-bit vector register, with an FPR64 as its high part.
253 class VR128<bits<16> num, string n, FPR64 high>
261 def V#I : VR128<I, "v"#I, !cast<FPR64>("F"#I#"D")>,
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/CSKY/
H A DCSKYRegisterInfo.td172 def FPR64 : RegisterClass<"CSKY", [f64], 64,