| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/IR/ |
| H A D | ConstrainedOps.def | 80 DAG_FUNCTION(log2, 1, 1, experimental_constrained_log2, FLOG2)
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| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 865 FLOG2, enumerator
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| H A D | BasicTTIImpl.h | 1547 ISDs.push_back(ISD::FLOG2); in getTypeBasedIntrinsicInstrCost()
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| /netbsd-src/sys/arch/m68k/m68k/ |
| H A D | db_disasm.h | 359 #define FLOG2 ENCFT(0,1,0,1,1,0) macro
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| H A D | db_disasm.c | 1438 case FLOG2: in opcode_fpu()
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| /netbsd-src/sys/arch/m68k/fpe/ |
| H A D | README | 70 FMOVECR, FLOGNP1, FLOGN, FLOG10, FLOG2, FMOD, FREM,
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGDumper.cpp | 223 case ISD::FLOG2: return "flog2"; in getOperationName()
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| H A D | LegalizeFloatTypes.cpp | 91 case ISD::FLOG2: R = SoftenFloatRes_FLOG2(N); break; in SoftenFloatResult()
1210 case ISD::FLOG2: ExpandFloatRes_FLOG2(N, Lo, Hi); break; in ExpandFloatResult()
2234 case ISD::FLOG2: in PromoteFloatResult()
2598 case ISD::FLOG2: in SoftPromoteHalfResult()
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| H A D | LegalizeVectorOps.cpp | 421 case ISD::FLOG2: in LegalizeOp()
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| H A D | LegalizeVectorTypes.cpp | 89 case ISD::FLOG2: in ScalarizeVectorResult()
982 case ISD::FLOG2: in SplitVectorResult()
3114 case ISD::FLOG2: in WidenVectorResult()
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| H A D | LegalizeDAG.cpp | 3982 case ISD::FLOG2: in ConvertNodeToLibcall()
4739 case ISD::FLOG2: in PromoteNode()
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| H A D | SelectionDAGBuilder.cpp | 5210 return DAG.getNode(ISD::FLOG2, dl, Op.getValueType(), Op, Flags); in expandLog2()
7979 if (visitUnaryFloatCall(I, ISD::FLOG2)) in visitCall()
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| H A D | SelectionDAG.cpp | 4336 case ISD::FLOG2: in isKnownNeverNaN()
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| /netbsd-src/sys/arch/m68k/fpsp/ |
| H A D | do_func.sa | 255 * FLOG2
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/ |
| H A D | MipsSEISelLowering.cpp | 155 setOperationAction(ISD::FLOG2, MVT::f16, Promote); in MipsSETargetLowering()
391 setOperationAction(ISD::FLOG2, Ty, Legal); in addMSAFloatType()
1899 return DAG.getNode(ISD::FLOG2, DL, Op->getValueType(0), Op->getOperand(1)); in lowerINTRINSIC_WO_CHAIN()
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| H A D | MipsISelLowering.cpp | 442 setOperationAction(ISD::FLOG2, MVT::f32, Expand); in MipsTargetLowering()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
| H A D | TargetLoweringBase.cpp | 864 setOperationAction(ISD::FLOG2, VT, Expand); in initActions()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelLowering.cpp | 296 setOperationAction(ISD::FLOG2, MVT::f32, Legal); in AMDGPUTargetLowering()
470 setOperationAction(ISD::FLOG2, VT, Expand); in AMDGPUTargetLowering()
2300 SDValue Log2Operand = DAG.getNode(ISD::FLOG2, SL, VT, Operand); in LowerFLOG()
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| H A D | SIISelLowering.cpp | 9370 case ISD::FLOG2: in fp16SrcZerosHighBits()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyISelLowering.cpp | 210 for (auto Op : {ISD::FCOPYSIGN, ISD::FLOG, ISD::FLOG2, ISD::FLOG10, in WebAssemblyTargetLowering()
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| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/Target/ |
| H A D | TargetSelectionDAG.td | 482 def flog2 : SDNode<"ISD::FLOG2" , SDTFPUnaryOp>;
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 370 setOperationAction(ISD::FLOG2, VT, Expand); in addMVEVectorTypes()
845 setOperationAction(ISD::FLOG2, MVT::v2f64, Expand); in ARMTargetLowering()
866 setOperationAction(ISD::FLOG2, MVT::v4f32, Expand); in ARMTargetLowering()
882 setOperationAction(ISD::FLOG2, MVT::v2f32, Expand); in ARMTargetLowering()
1025 setOperationAction(ISD::FLOG2, MVT::f64, Expand); in ARMTargetLowering()
1477 setOperationAction(ISD::FLOG2, MVT::f16, Promote); in ARMTargetLowering()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 357 setOperationAction(ISD::FLOG2, VT, Expand); in AArch64TargetLowering()
600 setOperationAction(ISD::FLOG2, MVT::f16, Promote); in AArch64TargetLowering()
601 setOperationAction(ISD::FLOG2, MVT::v4f16, Expand); in AArch64TargetLowering()
602 setOperationAction(ISD::FLOG2, MVT::v8f16, Expand); in AArch64TargetLowering()
1368 setOperationAction(ISD::FLOG2, VT, Expand); in addTypeForNEON()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.cpp | 1639 ISD::FCOS, ISD::FPOW, ISD::FLOG, ISD::FLOG2, in HexagonTargetLowering()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 797 setOperationAction(ISD::FLOG2, VT, Expand); in PPCTargetLowering()
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