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Searched refs:FIOp (Results 1 – 4 of 4) sorted by relevance

/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
H A DHexagonRegisterInfo.cpp204 int SPAdj, unsigned FIOp, in eliminateFrameIndex() argument
219 int FI = MI.getOperand(FIOp).getIndex(); in eliminateFrameIndex()
224 int RealOffset = Offset + MI.getOperand(FIOp+1).getImm(); in eliminateFrameIndex()
230 MI.getOperand(FIOp).ChangeToImmediate(RealOffset); in eliminateFrameIndex()
231 MI.RemoveOperand(FIOp+1); in eliminateFrameIndex()
342 MI.getOperand(FIOp).ChangeToRegister(BP, false, false, false); in eliminateFrameIndex()
343 MI.getOperand(FIOp+1).ChangeToImmediate(RealOffset); in eliminateFrameIndex()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
H A DSIRegisterInfo.cpp738 MachineOperand *FIOp = in resolveFrameIndex() local
745 assert(FIOp && FIOp->isFI() && "frame index must be address operand"); in resolveFrameIndex()
752 FIOp->ChangeToRegister(BaseReg, false); in resolveFrameIndex()
765 FIOp->ChangeToRegister(BaseReg, false); in resolveFrameIndex()
1510 MachineOperand &FIOp = MI->getOperand(FIOperandNum); in eliminateFrameIndex() local
1628 FIOp.ChangeToRegister(FrameReg, false); in eliminateFrameIndex()
1660 FIOp.ChangeToImmediate(Offset); in eliminateFrameIndex()
1661 if (TII->isImmOperandLegal(*MI, FIOperandNum, FIOp)) in eliminateFrameIndex()
1667 FIOp.ChangeToRegister(AMDGPU::M0, false); in eliminateFrameIndex()
1668 bool UseSGPR = TII->isOperandLegal(*MI, FIOperandNum, &FIOp); in eliminateFrameIndex()
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H A DSILowerSGPRSpills.cpp356 unsigned FIOp = AMDGPU::getNamedOperandIdx(MI.getOpcode(), in runOnMachineFunction() local
358 int FI = MI.getOperand(FIOp).getIndex(); in runOnMachineFunction()
369 TRI->eliminateFrameIndex(MI, 0, FIOp, RS.get()); in runOnMachineFunction()
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
H A DTargetLowering.h3428 virtual void computeKnownBitsForFrameIndex(int FIOp,