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Searched refs:FGETSIGN (Results 1 – 8 of 8) sorted by relevance

/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
H A DISDOpcodes.h474 FGETSIGN, enumerator
/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGDumper.cpp266 case ISD::FGETSIGN: return "fgetsign"; in getOperationName()
H A DTargetLowering.cpp2124 bool OpVTLegal = isOperationLegalOrCustom(ISD::FGETSIGN, VT); in SimplifyDemandedBits()
2125 bool i32Legal = isOperationLegalOrCustom(ISD::FGETSIGN, MVT::i32); in SimplifyDemandedBits()
2132 SDValue Sign = TLO.DAG.getNode(ISD::FGETSIGN, dl, Ty, Src); in SimplifyDemandedBits()
H A DSelectionDAG.cpp3316 case ISD::FGETSIGN: in computeKnownBits()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/
H A DTargetLoweringBase.cpp740 setOperationAction(ISD::FGETSIGN, VT, Expand); in initActions()
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/Target/
H A DTargetSelectionDAG.td474 def fgetsign : SDNode<"ISD::FGETSIGN" , SDTFPToIntOp>;
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp587 setOperationAction(ISD::FGETSIGN, MVT::i64, Custom); in X86TargetLowering()
588 setOperationAction(ISD::FGETSIGN, MVT::i32, Custom); in X86TargetLowering()
30322 case ISD::FGETSIGN: return LowerFGETSIGN(Op, DAG); in LowerOperation()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp1017 setOperationAction(ISD::FGETSIGN, MVT::f64, Expand); in ARMTargetLowering()