Searched refs:ElementWidth (Results 1 – 5 of 5) sorted by relevance
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/AsmParser/ |
| H A D | AArch64AsmParser.cpp | 350 int ElementWidth; member 377 unsigned ElementWidth; member 1117 template <int ElementWidth, unsigned Class> 1122 if (isSVEVectorReg<Class>() && (Reg.ElementWidth == ElementWidth)) in isSVEPredicateVectorRegOfWidth() 1128 template <int ElementWidth, unsigned Class> 1133 if (isSVEVectorReg<Class>() && Reg.ElementWidth == ElementWidth) in isSVEDataVectorRegOfWidth() 1139 template <int ElementWidth, unsigned Class, 1143 auto VectorMatch = isSVEDataVectorRegOfWidth<ElementWidth, Class>(); in isSVEDataVectorRegWithShiftExtend() 1229 unsigned ElementWidth> 1237 if (VectorList.ElementWidth != ElementWidth) in isTypedVectorList() [all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/Disassembler/ |
| H A D | AArch64Disassembler.cpp | 224 template <int ElementWidth> 1916 template <int ElementWidth> 1921 if (ElementWidth == 8 && Shift) in DecodeImm8OptLsl()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | AArch64RegisterInfo.td | 1003 class ZPRVectorList<int ElementWidth, int NumRegs> : AsmOperandClass { 1004 let Name = "SVEVectorList" # NumRegs # ElementWidth; 1007 "isTypedVectorList<RegKind::SVEDataVector, " #NumRegs #", 0, " #ElementWidth #">";
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| H A D | SVEInstrFormats.td | 158 class SVEShiftedImmOperand<int ElementWidth, string Infix, string Predicate> 160 let Name = "SVE" # Infix # "Imm" # ElementWidth; 177 class imm8_opt_lsl<int ElementWidth, string printType, 181 let DecoderMethod = "DecodeImm8OptLsl<" # ElementWidth # ">";
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| /netbsd-src/external/apache2/llvm/dist/clang/lib/AST/ |
| H A D | ExprConstant.cpp | 7109 CharUnits ElementWidth = Info.Ctx.getTypeSizeInChars(Ty->getElementType()); in visit() local 7114 visitType(Ty->getElementType(), Offset + I * ElementWidth); in visit()
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