Searched refs:DemandedSrc (Results 1 – 3 of 3) sorted by relevance
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | TargetLowering.cpp | 1099 SDValue DemandedSrc = SimplifyMultipleUseDemandedBits( in SimplifyDemandedBits() local
1101 if (DemandedSrc) { in SimplifyDemandedBits()
1102 SDValue NewOp = TLO.DAG.getNode(Op.getOpcode(), dl, VT, DemandedSrc, in SimplifyDemandedBits()
2101 if (SDValue DemandedSrc = SimplifyMultipleUseDemandedBits( in SimplifyDemandedBits() local
2104 TLO.DAG.getNode(Op.getOpcode(), dl, VT, DemandedSrc, Idx); in SimplifyDemandedBits()
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 10801 if (SDValue DemandedSrc = in performCvtF32UByteNCombine() local
10803 return DAG.getNode(N->getOpcode(), SL, MVT::f32, DemandedSrc); in performCvtF32UByteNCombine()
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 34844 APInt DemandedSrc = DemandedElts.zextOrTrunc(SrcVT.getVectorNumElements()); in ComputeNumSignBitsForTargetNode() local
34845 unsigned Tmp = DAG.ComputeNumSignBits(Src, DemandedSrc, Depth + 1); in ComputeNumSignBitsForTargetNode()
38509 APInt DemandedSrc = DemandedElts.lshr(ShiftAmt); in SimplifyDemandedVectorEltsForTargetNode() local
38510 if (SimplifyDemandedVectorElts(Src, DemandedSrc, KnownUndef, KnownZero, TLO, in SimplifyDemandedVectorEltsForTargetNode()
38548 APInt DemandedSrc = DemandedElts.shl(ShiftAmt); in SimplifyDemandedVectorEltsForTargetNode() local
38549 if (SimplifyDemandedVectorElts(Src, DemandedSrc, KnownUndef, KnownZero, TLO, in SimplifyDemandedVectorEltsForTargetNode()
38646 APInt DemandedSrc = DemandedElts.zextOrTrunc(SrcVT.getVectorNumElements()); in SimplifyDemandedVectorEltsForTargetNode() local
38648 if (SimplifyDemandedVectorElts(Src, DemandedSrc, SrcUndef, SrcZero, TLO, in SimplifyDemandedVectorEltsForTargetNode()
|