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Searched refs:DR (Results 1 – 25 of 235) sorted by relevance

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/netbsd-src/external/gpl3/binutils/dist/opcodes/
H A Drl78-decode.opc114 #define DR(r) OP (0, RL78_Operand_Register, RL78_Reg_##r, 0)
121 #define DCY() DR(PSW); DB(0)
207 ID(add); DR(A); SM(None, IMMU(2)); Fzac;
210 ID(add); DR(A); SM(HL, 0); Fzac;
213 ID(add); DR(A); SM2(HL, B, 0); Fzac;
216 ID(add); DR(A); SM(HL, IMMU(1)); Fzac;
219 ID(add); DR(A); SM2(HL, C, 0); Fzac;
222 ID(add); DR(A); SC(IMMU(1)); Fzac;
225 ID(add); DR(A); SRB(rba); Fzac;
228 ID(add); DR(A); SM(None, SADDR); Fzac;
[all …]
H A Drx-decode.opc118 #define DR(r) OP (0, RX_Operand_Register, r, 0)
310 ID(mov); DR(rdst); SC(IMM (1)); F_____;
329 ID(mov); DR(rdst); SC(immm); F_____;
354 ID(mov); sBWL(sz); DR(dst); SIs(src, dsp*4+a*2+b, sz); F_____;
360 ID(movbi); sBWL(sz); DR(rdst); SRR(isrc); S2R(bsrc); F_____;
363 ID(movbir); sBWL(sz); DR(rdst); SRR(isrc); S2R(bsrc); F_____;
366 ID(movbi); uBW(sz); DR(rdst); SRR(isrc); S2R(bsrc); F_____;
373 ID(mov); sBWL (sz); DR(rdst); F_____;
377 ID(mov); uBW(w); DR(dst); SIs(src, dsp*4+a*2+b, w); F_____;
380 ID(mov); uBW(s); SD(ss, rsrc, s); DR(rdst); F_____;
[all …]
H A Drl78-decode.c116 #define DR(r) OP (0, RL78_Operand_Register, RL78_Reg_##r, 0) macro
123 #define DCY() DR(PSW); DB(0)
235 ID(add); W(); DR(AX); SRW(rw); Fzac; in rl78_decode_opcode()
250 ID(add); W(); DR(AX); SM(None, IMMU(2)); Fzac; in rl78_decode_opcode()
265 ID(add); W(); DR(AX); SC(IMMU(2)); Fzac; in rl78_decode_opcode()
280 ID(add); W(); DR(AX); SM(None, SADDR); Fzac; in rl78_decode_opcode()
295 ID(xch); DR(A); SR(X); in rl78_decode_opcode()
312 ID(mov); DR(A); SM(B, IMMU(2)); in rl78_decode_opcode()
344 ID(add); DR(A); SM(None, SADDR); Fzac; in rl78_decode_opcode()
359 ID(add); DR(A); SC(IMMU(1)); Fzac; in rl78_decode_opcode()
[all …]
H A Dm32r-opc.c226 { { MNEM, ' ', OP (DR), ',', OP (SR), 0 } },
232 { { MNEM, ' ', OP (DR), ',', OP (SR), ',', OP (HASH), OP (SLO16), 0 } },
238 { { MNEM, ' ', OP (DR), ',', OP (SR), 0 } },
244 { { MNEM, ' ', OP (DR), ',', OP (SR), ',', OP (UIMM16), 0 } },
250 { { MNEM, ' ', OP (DR), ',', OP (SR), 0 } },
256 { { MNEM, ' ', OP (DR), ',', OP (SR), ',', OP (HASH), OP (ULO16), 0 } },
262 { { MNEM, ' ', OP (DR), ',', OP (SR), 0 } },
268 { { MNEM, ' ', OP (DR), ',', OP (SR), ',', OP (UIMM16), 0 } },
274 { { MNEM, ' ', OP (DR), ',', OP (SIMM8), 0 } },
280 { { MNEM, ' ', OP (DR), ',', OP (SR), 0 } },
[all …]
H A Dm32r-opinst.c46 { INPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
48 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
55 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
62 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
69 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
74 { INPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
76 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
81 { INPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
84 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
92 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
[all …]
H A Drx-decode.c120 #define DR(r) OP (0, RX_Operand_Register, r, 0) macro
441 ID(sub); S2Pm(ss, rsrc, mx); SR(rdst); DR(rdst); F_OSZC; in rx_decode_opcode()
566 ID(add); SPm(ss, rsrc, mx); DR(rdst); F_OSZC; in rx_decode_opcode()
627 ID(mul); SPm(ss, rsrc, mx); DR(rdst); F_____; in rx_decode_opcode()
688 ID(and); SPm(ss, rsrc, mx); DR(rdst); F__SZ_; in rx_decode_opcode()
749 ID(or); SPm(ss, rsrc, mx); DR(rdst); F__SZ_; in rx_decode_opcode()
814 ID(sbb); SPm(sp, rsrc, mx); DR(rdst); F_OSZC; in rx_decode_opcode()
851 ID(max); SPm(ss, rsrc, mx); DR(rdst); in rx_decode_opcode()
888 ID(min); SPm(ss, rsrc, mx); DR(rdst); in rx_decode_opcode()
925 ID(emul); SPm(ss, rsrc, mx); DR(rdst); in rx_decode_opcode()
[all …]
H A Dmsp430-decode.opc80 #define DR(r) OP (0, MSP430_Operand_Register, r, 0)
187 DR (reg);
440 ID (MSO_mov); SM (srcr, 0); DR (dstr);
445 ID (MSO_mov); SI (srcr); DR (dstr);
450 ID (MSO_mov); SA ((srcr << 16) + IMMU(2)); DR (dstr);
455 ID (MSO_mov); SM (srcr, IMMS(2)); DR (dstr);
470 ID (MSO_mov); SC ((srcr << 16) + IMMU(2)); DR (dstr);
475 ID (MSO_cmp); SC ((srcr << 16) + IMMU(2)); DR (dstr);
481 ID (MSO_add); SC ((srcr << 16) + IMMU(2)); DR (dstr);
487 ID (MSO_sub); SC ((srcr << 16) + IMMU(2)); DR (dstr);
[all …]
/netbsd-src/external/gpl3/binutils.old/dist/opcodes/
H A Drl78-decode.opc114 #define DR(r) OP (0, RL78_Operand_Register, RL78_Reg_##r, 0)
121 #define DCY() DR(PSW); DB(0)
207 ID(add); DR(A); SM(None, IMMU(2)); Fzac;
210 ID(add); DR(A); SM(HL, 0); Fzac;
213 ID(add); DR(A); SM2(HL, B, 0); Fzac;
216 ID(add); DR(A); SM(HL, IMMU(1)); Fzac;
219 ID(add); DR(A); SM2(HL, C, 0); Fzac;
222 ID(add); DR(A); SC(IMMU(1)); Fzac;
225 ID(add); DR(A); SRB(rba); Fzac;
228 ID(add); DR(A); SM(None, SADDR); Fzac;
[all …]
H A Drx-decode.opc118 #define DR(r) OP (0, RX_Operand_Register, r, 0)
310 ID(mov); DR(rdst); SC(IMM (1)); F_____;
329 ID(mov); DR(rdst); SC(immm); F_____;
354 ID(mov); sBWL(sz); DR(dst); SIs(src, dsp*4+a*2+b, sz); F_____;
360 ID(movbi); sBWL(sz); DR(rdst); SRR(isrc); S2R(bsrc); F_____;
363 ID(movbir); sBWL(sz); DR(rdst); SRR(isrc); S2R(bsrc); F_____;
366 ID(movbi); uBW(sz); DR(rdst); SRR(isrc); S2R(bsrc); F_____;
373 ID(mov); sBWL (sz); DR(rdst); F_____;
377 ID(mov); uBW(w); DR(dst); SIs(src, dsp*4+a*2+b, w); F_____;
380 ID(mov); uBW(s); SD(ss, rsrc, s); DR(rdst); F_____;
[all …]
H A Drl78-decode.c116 #define DR(r) OP (0, RL78_Operand_Register, RL78_Reg_##r, 0) macro
123 #define DCY() DR(PSW); DB(0)
235 ID(add); W(); DR(AX); SRW(rw); Fzac; in rl78_decode_opcode()
250 ID(add); W(); DR(AX); SM(None, IMMU(2)); Fzac; in rl78_decode_opcode()
265 ID(add); W(); DR(AX); SC(IMMU(2)); Fzac; in rl78_decode_opcode()
280 ID(add); W(); DR(AX); SM(None, SADDR); Fzac; in rl78_decode_opcode()
295 ID(xch); DR(A); SR(X); in rl78_decode_opcode()
312 ID(mov); DR(A); SM(B, IMMU(2)); in rl78_decode_opcode()
344 ID(add); DR(A); SM(None, SADDR); Fzac; in rl78_decode_opcode()
359 ID(add); DR(A); SC(IMMU(1)); Fzac; in rl78_decode_opcode()
[all …]
H A Dm32r-opc.c226 { { MNEM, ' ', OP (DR), ',', OP (SR), 0 } },
232 { { MNEM, ' ', OP (DR), ',', OP (SR), ',', OP (HASH), OP (SLO16), 0 } },
238 { { MNEM, ' ', OP (DR), ',', OP (SR), 0 } },
244 { { MNEM, ' ', OP (DR), ',', OP (SR), ',', OP (UIMM16), 0 } },
250 { { MNEM, ' ', OP (DR), ',', OP (SR), 0 } },
256 { { MNEM, ' ', OP (DR), ',', OP (SR), ',', OP (HASH), OP (ULO16), 0 } },
262 { { MNEM, ' ', OP (DR), ',', OP (SR), 0 } },
268 { { MNEM, ' ', OP (DR), ',', OP (SR), ',', OP (UIMM16), 0 } },
274 { { MNEM, ' ', OP (DR), ',', OP (SIMM8), 0 } },
280 { { MNEM, ' ', OP (DR), ',', OP (SR), 0 } },
[all …]
H A Dm32r-opinst.c46 { INPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
48 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
55 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
62 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
69 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
74 { INPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
76 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
81 { INPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
84 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
92 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
[all …]
H A Drx-decode.c120 #define DR(r) OP (0, RX_Operand_Register, r, 0) macro
441 ID(sub); S2Pm(ss, rsrc, mx); SR(rdst); DR(rdst); F_OSZC; in rx_decode_opcode()
566 ID(add); SPm(ss, rsrc, mx); DR(rdst); F_OSZC; in rx_decode_opcode()
627 ID(mul); SPm(ss, rsrc, mx); DR(rdst); F_____; in rx_decode_opcode()
688 ID(and); SPm(ss, rsrc, mx); DR(rdst); F__SZ_; in rx_decode_opcode()
749 ID(or); SPm(ss, rsrc, mx); DR(rdst); F__SZ_; in rx_decode_opcode()
814 ID(sbb); SPm(sp, rsrc, mx); DR(rdst); F_OSZC; in rx_decode_opcode()
851 ID(max); SPm(ss, rsrc, mx); DR(rdst); in rx_decode_opcode()
888 ID(min); SPm(ss, rsrc, mx); DR(rdst); in rx_decode_opcode()
925 ID(emul); SPm(ss, rsrc, mx); DR(rdst); in rx_decode_opcode()
[all …]
H A Dmsp430-decode.opc80 #define DR(r) OP (0, MSP430_Operand_Register, r, 0)
187 DR (reg);
440 ID (MSO_mov); SM (srcr, 0); DR (dstr);
445 ID (MSO_mov); SI (srcr); DR (dstr);
450 ID (MSO_mov); SA ((srcr << 16) + IMMU(2)); DR (dstr);
455 ID (MSO_mov); SM (srcr, IMMS(2)); DR (dstr);
470 ID (MSO_mov); SC ((srcr << 16) + IMMU(2)); DR (dstr);
475 ID (MSO_cmp); SC ((srcr << 16) + IMMU(2)); DR (dstr);
481 ID (MSO_add); SC ((srcr << 16) + IMMU(2)); DR (dstr);
487 ID (MSO_sub); SC ((srcr << 16) + IMMU(2)); DR (dstr);
[all …]
/netbsd-src/external/gpl3/gcc/dist/gcc/
H A Dtree-data-ref.h184 #define DR_STMT(DR) (DR)->stmt argument
185 #define DR_REF(DR) (DR)->ref argument
186 #define DR_BASE_OBJECT(DR) (DR)->indices.base_object argument
187 #define DR_UNCONSTRAINED_BASE(DR) (DR)->indices.unconstrained_base argument
188 #define DR_ACCESS_FNS(DR) (DR)->indices.access_fns argument
189 #define DR_ACCESS_FN(DR, I) DR_ACCESS_FNS (DR)[I] argument
190 #define DR_NUM_DIMENSIONS(DR) DR_ACCESS_FNS (DR).length () argument
191 #define DR_IS_READ(DR) (DR)->is_read argument
192 #define DR_IS_WRITE(DR) (!DR_IS_READ (DR)) argument
193 #define DR_IS_CONDITIONAL_IN_STMT(DR) (DR)->is_conditional_in_stmt argument
[all …]
/netbsd-src/external/gpl3/gcc.old/dist/gcc/
H A Dtree-data-ref.h179 #define DR_STMT(DR) (DR)->stmt argument
180 #define DR_REF(DR) (DR)->ref argument
181 #define DR_BASE_OBJECT(DR) (DR)->indices.base_object argument
182 #define DR_UNCONSTRAINED_BASE(DR) (DR)->indices.unconstrained_base argument
183 #define DR_ACCESS_FNS(DR) (DR)->indices.access_fns argument
184 #define DR_ACCESS_FN(DR, I) DR_ACCESS_FNS (DR)[I] argument
185 #define DR_NUM_DIMENSIONS(DR) DR_ACCESS_FNS (DR).length () argument
186 #define DR_IS_READ(DR) (DR)->is_read argument
187 #define DR_IS_WRITE(DR) (!DR_IS_READ (DR)) argument
188 #define DR_IS_CONDITIONAL_IN_STMT(DR) (DR)->is_conditional_in_stmt argument
[all …]
/netbsd-src/sys/external/bsd/sljit/dist/sljit_src/
H A DsljitNativeSPARC_32.c32 return push_inst(compiler, OR | D(dst) | S1(0) | IMM(imm), DR(dst)); in load_immediate()
34 FAIL_IF(push_inst(compiler, SETHI | D(dst) | ((imm >> 10) & 0x3fffff), DR(dst))); in load_immediate()
35 …return (imm & 0x3ff) ? push_inst(compiler, OR | D(dst) | S1(dst) | IMM_ARG | (imm & 0x3ff), DR(dst… in load_immediate()
52 return push_inst(compiler, OR | D(dst) | S1(0) | S2(src2), DR(dst)); in emit_single_op()
60 return push_inst(compiler, AND | D(dst) | S1(src2) | IMM(0xff), DR(dst)); in emit_single_op()
61 FAIL_IF(push_inst(compiler, SLL | D(dst) | S1(src2) | IMM(24), DR(dst))); in emit_single_op()
62 return push_inst(compiler, SRA | D(dst) | S1(dst) | IMM(24), DR(dst)); in emit_single_op()
72 FAIL_IF(push_inst(compiler, SLL | D(dst) | S1(src2) | IMM(16), DR(dst))); in emit_single_op()
73 …return push_inst(compiler, (op == SLJIT_MOV_S16 ? SRA : SRL) | D(dst) | S1(dst) | IMM(16), DR(dst)… in emit_single_op()
81 …return push_inst(compiler, XNOR | (flags & SET_FLAGS) | D(dst) | S1(0) | S2(src2), DR(dst) | (flag… in emit_single_op()
[all …]
H A DsljitNativeMIPS_64.c131 FAIL_IF(push_inst(compiler, op_imm | S(src1) | T(dst) | IMM(src2), DR(dst))); \
137 FAIL_IF(push_inst(compiler, op_norm | S(src1) | T(src2) | D(dst), DR(dst))); \
152 FAIL_IF(push_inst(compiler, ins | T(src1) | D(dst) | SH_IMM(src2), DR(dst))); \
159 FAIL_IF(push_inst(compiler, ins | S(src2) | T(src1) | D(dst), DR(dst))); \
173 return push_inst(compiler, SELECT_OP(DADDU, ADDU) | S(src2) | TA(0) | D(dst), DR(dst)); in emit_single_op()
181 FAIL_IF(push_inst(compiler, DSLL32 | T(src2) | D(dst) | SH_IMM(24), DR(dst))); in emit_single_op()
182 return push_inst(compiler, DSRA32 | T(dst) | D(dst) | SH_IMM(24), DR(dst)); in emit_single_op()
184 return push_inst(compiler, ANDI | S(src2) | T(dst) | IMM(0xff), DR(dst)); in emit_single_op()
196 FAIL_IF(push_inst(compiler, DSLL32 | T(src2) | D(dst) | SH_IMM(16), DR(dst))); in emit_single_op()
197 return push_inst(compiler, DSRA32 | T(dst) | D(dst) | SH_IMM(16), DR(dst)); in emit_single_op()
[all …]
H A DsljitNativeMIPS_32.c48 FAIL_IF(push_inst(compiler, op_imm | S(src1) | T(dst) | IMM(src2), DR(dst))); \
54 FAIL_IF(push_inst(compiler, op_norm | S(src1) | T(src2) | D(dst), DR(dst))); \
62 FAIL_IF(push_inst(compiler, op_imm | T(src1) | D(dst) | SH_IMM(src2), DR(dst))); \
68 FAIL_IF(push_inst(compiler, op_v | S(src2) | T(src1) | D(dst), DR(dst))); \
83 return push_inst(compiler, ADDU | S(src2) | TA(0) | D(dst), DR(dst)); in emit_single_op()
92 return push_inst(compiler, SEB | T(src2) | D(dst), DR(dst)); in emit_single_op()
94 FAIL_IF(push_inst(compiler, SLL | T(src2) | D(dst) | SH_IMM(24), DR(dst))); in emit_single_op()
95 return push_inst(compiler, SRA | T(dst) | D(dst) | SH_IMM(24), DR(dst)); in emit_single_op()
98 return push_inst(compiler, ANDI | S(src2) | T(dst) | IMM(0xff), DR(dst)); in emit_single_op()
111 return push_inst(compiler, SEH | T(src2) | D(dst), DR(dst)); in emit_single_op()
[all …]
H A DsljitNativeMIPS_common.c89 #define DR(dr) (reg_map[dr]) macro
564 …FAIL_IF(push_inst(compiler, ADDIU_W | S(SLJIT_SP) | T(SLJIT_SP) | IMM(-local_size), DR(SLJIT_SP))); in sljit_emit_enter()
568 FAIL_IF(load_immediate(compiler, DR(TMP_REG1), local_size)); in sljit_emit_enter()
569 FAIL_IF(push_inst(compiler, ADDU_W | S(SLJIT_SP) | TA(0) | D(TMP_REG2), DR(TMP_REG2))); in sljit_emit_enter()
570 FAIL_IF(push_inst(compiler, SUBU_W | S(SLJIT_SP) | T(TMP_REG1) | D(SLJIT_SP), DR(SLJIT_SP))); in sljit_emit_enter()
590 FAIL_IF(push_inst(compiler, ADDU_W | SA(4) | TA(0) | D(SLJIT_S0), DR(SLJIT_S0))); in sljit_emit_enter()
592 FAIL_IF(push_inst(compiler, ADDU_W | SA(5) | TA(0) | D(SLJIT_S1), DR(SLJIT_S1))); in sljit_emit_enter()
594 FAIL_IF(push_inst(compiler, ADDU_W | SA(6) | TA(0) | D(SLJIT_S2), DR(SLJIT_S2))); in sljit_emit_enter()
630 FAIL_IF(load_immediate(compiler, DR(TMP_REG1), local_size)); in sljit_emit_return()
631 FAIL_IF(push_inst(compiler, ADDU_W | S(SLJIT_SP) | T(TMP_REG1) | D(TMP_REG1), DR(TMP_REG1))); in sljit_emit_return()
[all …]
/netbsd-src/external/apache2/llvm/dist/clang/lib/StaticAnalyzer/Checkers/
H A DDeadStoresChecker.cpp55 bool VisitDeclRefExpr(DeclRefExpr *DR) { in VisitDeclRefExpr() argument
57 if (const VarDecl *D = dyn_cast<VarDecl>(DR->getDecl())) in VisitDeclRefExpr()
289 void CheckDeclRef(const DeclRefExpr *DR, const Expr *Val, DeadStoreKind dsk, in CheckDeclRef() argument
291 if (const VarDecl *VD = dyn_cast<VarDecl>(DR->getDecl())) in CheckDeclRef()
292 CheckVarDecl(VD, DR, Val, dsk, Live); in CheckDeclRef()
305 const DeclRefExpr *DR; in isIncrement() local
307 if ((DR = dyn_cast<DeclRefExpr>(BRHS->getLHS()->IgnoreParenCasts()))) in isIncrement()
308 if (DR->getDecl() == VD) in isIncrement()
311 if ((DR = dyn_cast<DeclRefExpr>(BRHS->getRHS()->IgnoreParenCasts()))) in isIncrement()
312 if (DR->getDecl() == VD) in isIncrement()
[all …]
H A DMallocOverflowSecurityChecker.cpp143 static const Decl *getDecl(const DeclRefExpr *DR) { return DR->getDecl(); } in getDecl() argument
149 void Erase(const T1 *DR, in Erase() argument
151 auto P = [DR, Pred](const MallocOverflowCheck &Check) { in Erase()
153 return getDecl(CheckDR) == getDecl(DR) && Pred(Check); in Erase()
163 if (const DeclRefExpr *DR = dyn_cast<DeclRefExpr>(E)) in CheckExpr() local
164 Erase<DeclRefExpr>(DR, PredTrue); in CheckExpr()
220 if (const DeclRefExpr *DR = dyn_cast<DeclRefExpr>(E)) in CheckAssignmentExpr() local
221 Erase<DeclRefExpr>(DR, pred); in CheckAssignmentExpr()
/netbsd-src/external/apache2/llvm/dist/clang/lib/Analysis/
H A DLiveVariables.cpp166 void VisitDeclRefExpr(DeclRefExpr *DR);
329 if (const auto *DR = dyn_cast<DeclRefExpr>(B->getLHS()->IgnoreParens())) { in VisitBinaryOperator() local
330 LV.inAssignment[DR] = 1; in VisitBinaryOperator()
340 if (DeclRefExpr *DR = dyn_cast<DeclRefExpr>(LHS)) { in VisitBinaryOperator() local
341 const Decl* D = DR->getDecl(); in VisitBinaryOperator()
356 observer->observerKill(DR); in VisitBinaryOperator()
370 void TransferFunctions::VisitDeclRefExpr(DeclRefExpr *DR) { in VisitDeclRefExpr() argument
371 const Decl* D = DR->getDecl(); in VisitDeclRefExpr()
372 bool InAssignment = LV.inAssignment[DR]; in VisitDeclRefExpr()
396 DeclRefExpr *DR = nullptr; in VisitObjCForCollectionStmt() local
[all …]
/netbsd-src/external/apache2/llvm/dist/clang/lib/StaticAnalyzer/Core/
H A DCheckerHelpers.cpp39 const DeclRefExpr *DR = dyn_cast<DeclRefExpr>(S); in containsEnum() local
41 if (DR && isa<EnumConstantDecl>(DR->getDecl())) in containsEnum()
53 const DeclRefExpr *DR = dyn_cast<DeclRefExpr>(S); in containsStaticLocal() local
55 if (DR) in containsStaticLocal()
56 if (const VarDecl *VD = dyn_cast<VarDecl>(DR->getDecl())) in containsStaticLocal()
/netbsd-src/external/apache2/llvm/dist/clang/tools/diagtool/
H A DTreeView.cpp51 for (const DiagnosticRecord &DR : Group.diagnostics()) { in enabledByDefault() local
52 if (isIgnored(DR.DiagID)) in enabledByDefault()
82 for (const DiagnosticRecord &DR : Group.diagnostics()) { in printGroup() local
83 if (!isIgnored(DR.DiagID)) in printGroup()
86 out << DR.getName() << Colors::RESET << "\n"; in printGroup()

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