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Searched refs:DIV_ROUND_CLOSEST (Results 1 – 20 of 20) sorted by relevance

/netbsd-src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/subdev/volt/
H A Dnouveau_nvkm_subdev_volt_gk20a.c61 mv = DIV_ROUND_CLOSEST(coef->c2 * speedo, s_scale); in gk20a_volt_get_cvb_voltage()
62 mv = DIV_ROUND_CLOSEST((mv + coef->c1) * speedo, s_scale) + coef->c0; in gk20a_volt_get_cvb_voltage()
79 mv = DIV_ROUND_CLOSEST(coef->c3 * speedo, s_scale) + coef->c4 + in gk20a_volt_get_cvb_t_voltage()
80 DIV_ROUND_CLOSEST(coef->c5 * temp, t_scale); in gk20a_volt_get_cvb_t_voltage()
81 mv = DIV_ROUND_CLOSEST(mv * temp, t_scale) + cvb_mv; in gk20a_volt_get_cvb_t_voltage()
/netbsd-src/sys/external/bsd/drm2/dist/drm/i915/display/
H A Dintel_dp_aux_backlight.c133 fxp = DIV_ROUND_CLOSEST(KHz(DP_EDP_BACKLIGHT_FREQ_BASE_KHZ), freq); in intel_dp_aux_set_pwm_freq()
155 fxp_min = DIV_ROUND_CLOSEST(fxp * 3, 4); in intel_dp_aux_set_pwm_freq()
156 fxp_max = DIV_ROUND_CLOSEST(fxp * 5, 4); in intel_dp_aux_set_pwm_freq()
163 f = clamp(DIV_ROUND_CLOSEST(fxp, 1 << pn), 1, 255); in intel_dp_aux_set_pwm_freq()
H A Dvlv_dsi_pll.c56 dsi_clk_khz = DIV_ROUND_CLOSEST(pclk * bpp, lane_count); in dsi_clk_from_pclk()
318 pclk = DIV_ROUND_CLOSEST(dsi_clock * intel_dsi->lane_count, bpp); in vlv_dsi_get_pclk()
339 pclk = DIV_ROUND_CLOSEST(dsi_clk * intel_dsi->lane_count, bpp); in bxt_dsi_get_pclk()
377 div1_value = DIV_ROUND_CLOSEST(ddr_clk, 20000); in glk_dsi_program_esc_clock()
H A Dintel_cdclk.c295 cdclk_state->cdclk = DIV_ROUND_CLOSEST(cdclk_state->vco, in g33_get_cdclk()
372 cdclk_state->cdclk = DIV_ROUND_CLOSEST(cdclk_state->vco, in i965gm_get_cdclk()
465 return DIV_ROUND_CLOSEST(dev_priv->hpll_freq << 1, cdclk) - 1; in vlv_calc_voltage_level()
577 divider = DIV_ROUND_CLOSEST(dev_priv->hpll_freq << 1, in vlv_set_cdclk()
788 I915_WRITE(CDCLK_FREQ, DIV_ROUND_CLOSEST(cdclk, 1000) - 1); in bdw_set_cdclk()
932 return DIV_ROUND_CLOSEST(cdclk - 1000, 500); in skl_cdclk_decimal()
1399 cdclk_state->cdclk = DIV_ROUND_CLOSEST(cdclk_state->vco, div); in bxt_get_cdclk()
1424 int ratio = DIV_ROUND_CLOSEST(vco, dev_priv->cdclk.hw.ref); in bxt_de_pll_enable()
1459 int ratio = DIV_ROUND_CLOSEST(vco, dev_priv->cdclk.hw.ref); in cnl_cdclk_pll_enable()
1526 switch (DIV_ROUND_CLOSEST(vco, cdclk)) { in bxt_set_cdclk()
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H A Dintel_panel.c1408 return DIV_ROUND_CLOSEST(KHz(dev_priv->rawclk_freq), pwm_freq_hz); in cnp_hz_to_pwm()
1416 return DIV_ROUND_CLOSEST(KHz(19200), pwm_freq_hz); in bxt_hz_to_pwm()
1434 return DIV_ROUND_CLOSEST(MHz(24), pwm_freq_hz * mul); in spt_hz_to_pwm()
1458 return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * mul); in lpt_hz_to_pwm()
1469 return DIV_ROUND_CLOSEST(KHz(dev_priv->rawclk_freq), pwm_freq_hz * 128); in pch_hz_to_pwm()
1490 return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * 32); in i9xx_hz_to_pwm()
1508 return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * 128); in i965_hz_to_pwm()
1532 return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * mul); in vlv_hz_to_pwm()
H A Dintel_bw.c151 return DIV_ROUND_CLOSEST(num * dclk * 100, den * 6); in icl_calc_bw()
H A Dintel_sprite.c801 contrast = DIV_ROUND_CLOSEST(255 << 6, 235 - 16); in vlv_update_clrc()
802 brightness = -DIV_ROUND_CLOSEST(16 * 255, 235 - 16); in vlv_update_clrc()
803 sh_scale = DIV_ROUND_CLOSEST(128 << 7, 240 - 128); in vlv_update_clrc()
H A Dintel_display.c219 return DIV_ROUND_CLOSEST(ref_freq << 1, divider + 1); in vlv_get_cck_clock()
586 clock->vco = DIV_ROUND_CLOSEST(refclk * clock->m, clock->n); in pnv_calc_dpll_params()
587 clock->dot = DIV_ROUND_CLOSEST(clock->vco, clock->p); in pnv_calc_dpll_params()
603 clock->vco = DIV_ROUND_CLOSEST(refclk * clock->m, clock->n + 2); in i9xx_calc_dpll_params()
604 clock->dot = DIV_ROUND_CLOSEST(clock->vco, clock->p); in i9xx_calc_dpll_params()
615 clock->vco = DIV_ROUND_CLOSEST(refclk * clock->m, clock->n); in vlv_calc_dpll_params()
616 clock->dot = DIV_ROUND_CLOSEST(clock->vco, clock->p); in vlv_calc_dpll_params()
629 clock->dot = DIV_ROUND_CLOSEST(clock->vco, clock->p); in chv_calc_dpll_params()
948 clock.m2 = DIV_ROUND_CLOSEST(target * clock.p * clock.n, in vlv_find_best_dpll()
5552 desired_divisor = DIV_ROUND_CLOSEST(iclk_virtual_root_freq, in lpt_program_iclkip()
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H A Dicl_dsi.c322 return DIV_ROUND_CLOSEST(intel_dsi->pclk * bpp, intel_dsi->lane_count); in afe_clk()
H A Dintel_dp.c1238 return DIV_ROUND_CLOSEST(dev_priv->rawclk_freq, 2000); in g4x_get_aux_clock_divider()
1255 return DIV_ROUND_CLOSEST(dev_priv->cdclk.hw.cdclk, 2000); in ilk_get_aux_clock_divider()
1257 return DIV_ROUND_CLOSEST(dev_priv->rawclk_freq, 2000); in ilk_get_aux_clock_divider()
H A Dintel_display_power.c1257 DIV_ROUND_CLOSEST(dev_priv->rawclk_freq, 1000)); in vlv_init_display_clock_gating()
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A Damdgpu_pll.c98 *ref_div = min(max(DIV_ROUND_CLOSEST(den, post_div), 1u), ref_div_max); in amdgpu_pll_get_fb_ref_div()
99 *fb_div = DIV_ROUND_CLOSEST(nom * *ref_div * post_div, den); in amdgpu_pll_get_fb_ref_div()
103 *ref_div = DIV_ROUND_CLOSEST(*ref_div * fb_div_max, *fb_div); in amdgpu_pll_get_fb_ref_div()
/netbsd-src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/subdev/clk/
H A Dnouveau_nvkm_subdev_clk_gm20b.c201 s32 mv = DIV_ROUND_CLOSEST(uv, 1000); in gm20b_dvfs_calc_det_coeff()
204 coeff = DIV_ROUND_CLOSEST(mv * p->coeff_slope, 1000) + p->coeff_offs; in gm20b_dvfs_calc_det_coeff()
205 coeff = DIV_ROUND_CLOSEST(coeff, 1000); in gm20b_dvfs_calc_det_coeff()
208 dvfs->dfs_ext_cal = DIV_ROUND_CLOSEST(uv - clk->uvdet_offs, in gm20b_dvfs_calc_det_coeff()
239 det_delta = DIV_ROUND_CLOSEST(((s32)clk->uv) - clk->uvdet_offs, in gm20b_dvfs_calc_ndiv()
/netbsd-src/sys/external/bsd/drm2/dist/drm/i915/gt/
H A Dintel_rps.c1235 return DIV_ROUND_CLOSEST(rps->gpll_ref_freq * (val - 0xb7), 1000); in byt_gpu_freq()
1240 return DIV_ROUND_CLOSEST(1000 * val, rps->gpll_ref_freq) + 0xb7; in byt_freq_opcode()
1249 return DIV_ROUND_CLOSEST(rps->gpll_ref_freq * val, 2 * 2 * 1000); in chv_gpu_freq()
1255 return DIV_ROUND_CLOSEST(2 * 1000 * val, rps->gpll_ref_freq) * 2; in chv_freq_opcode()
1263 return DIV_ROUND_CLOSEST(val * GT_FREQUENCY_MULTIPLIER, in intel_gpu_freq()
1278 return DIV_ROUND_CLOSEST(val * GEN9_FREQ_SCALER, in intel_freq_opcode()
1285 return DIV_ROUND_CLOSEST(val, GT_FREQUENCY_MULTIPLIER); in intel_freq_opcode()
H A Dintel_llc.c118 ia_freq = DIV_ROUND_CLOSEST(ia_freq, 100); in calc_ia_freq()
/netbsd-src/sys/external/bsd/common/include/linux/
H A Dkernel.h102 #define DIV_ROUND_CLOSEST(N, D) \ macro
/netbsd-src/sys/external/bsd/drm2/dist/drm/
H A Ddrm_modes.c813 refresh = DIV_ROUND_CLOSEST(num, den); in drm_mode_vrefresh()
H A Ddrm_edid.c3270 clock = DIV_ROUND_CLOSEST(clock * 1001, 1000); in cea_mode_alternate_clock()
3272 clock = DIV_ROUND_CLOSEST(clock * 1000, 1001); in cea_mode_alternate_clock()
/netbsd-src/sys/external/bsd/drm2/dist/drm/radeon/
H A Dradeon_display.c931 *fb_div = DIV_ROUND_CLOSEST(nom * *ref_div * post_div, den); in avivo_get_fb_ref_div()
/netbsd-src/sys/external/bsd/drm2/dist/drm/i915/
H A Dintel_pm.c2841 linetime = DIV_ROUND_CLOSEST(adjusted_mode->crtc_htotal * 1000 * 8, in hsw_compute_linetime_wm()
2843 ips_linetime = DIV_ROUND_CLOSEST(adjusted_mode->crtc_htotal * 1000 * 8, in hsw_compute_linetime_wm()