Searched refs:DCFCLKPerState (Results 1 – 5 of 5) sorted by relevance
3488 locals->ReturnBWToDCNPerState = dml_min(locals->ReturnBusWidth * locals->DCFCLKPerState[i], in dml20v2_ModeSupportAndSystemConfigurationFull()3494 …EnabledInAnyPlane == true && locals->ReturnBWToDCNPerState > locals->DCFCLKPerState[i] * locals->R… in dml20v2_ModeSupportAndSystemConfigurationFull()3498 / (locals->ReturnBWToDCNPerState - locals->DCFCLKPerState[i] in dml20v2_ModeSupportAndSystemConfigurationFull()3501 locals->CriticalPoint = 2 * locals->ReturnBusWidth * locals->DCFCLKPerState[i] * in dml20v2_ModeSupportAndSystemConfigurationFull()3509 * locals->ReturnBusWidth * locals->DCFCLKPerState[i] * locals->UrgentLatency / in dml20v2_ModeSupportAndSystemConfigurationFull()3515 locals->DCFCLKPerState[i], locals->FabricAndDRAMBandwidthPerState[i] * 1000); in dml20v2_ModeSupportAndSystemConfigurationFull()3517 …EnabledInAnyPlane == true && locals->ReturnBWToDCNPerState > locals->DCFCLKPerState[i] * locals->R… in dml20v2_ModeSupportAndSystemConfigurationFull()3521 / (locals->ReturnBWToDCNPerState - locals->DCFCLKPerState[i] in dml20v2_ModeSupportAndSystemConfigurationFull()3524 locals->CriticalPoint = 2 * locals->ReturnBusWidth * locals->DCFCLKPerState[i] * in dml20v2_ModeSupportAndSystemConfigurationFull()3532 * locals->ReturnBusWidth * locals->DCFCLKPerState[i] * locals->UrgentLatency / in dml20v2_ModeSupportAndSystemConfigurationFull()[all …]
3451 locals->ReturnBWToDCNPerState = dml_min(locals->ReturnBusWidth * locals->DCFCLKPerState[i], in dml20_ModeSupportAndSystemConfigurationFull()3457 …EnabledInAnyPlane == true && locals->ReturnBWToDCNPerState > locals->DCFCLKPerState[i] * locals->R… in dml20_ModeSupportAndSystemConfigurationFull()3461 / (locals->ReturnBWToDCNPerState - locals->DCFCLKPerState[i] in dml20_ModeSupportAndSystemConfigurationFull()3464 locals->CriticalPoint = 2 * locals->ReturnBusWidth * locals->DCFCLKPerState[i] * in dml20_ModeSupportAndSystemConfigurationFull()3472 * locals->ReturnBusWidth * locals->DCFCLKPerState[i] * locals->UrgentLatency / in dml20_ModeSupportAndSystemConfigurationFull()3478 locals->DCFCLKPerState[i], locals->FabricAndDRAMBandwidthPerState[i] * 1000); in dml20_ModeSupportAndSystemConfigurationFull()3480 …EnabledInAnyPlane == true && locals->ReturnBWToDCNPerState > locals->DCFCLKPerState[i] * locals->R… in dml20_ModeSupportAndSystemConfigurationFull()3484 / (locals->ReturnBWToDCNPerState - locals->DCFCLKPerState[i] in dml20_ModeSupportAndSystemConfigurationFull()3487 locals->CriticalPoint = 2 * locals->ReturnBusWidth * locals->DCFCLKPerState[i] * in dml20_ModeSupportAndSystemConfigurationFull()3495 * locals->ReturnBusWidth * locals->DCFCLKPerState[i] * locals->UrgentLatency / in dml20_ModeSupportAndSystemConfigurationFull()[all …]
401 double DCFCLKPerState[DC__VOLTAGE_STATES + 1]; member
262 mode_lib->vba.DCFCLKPerState[i] = soc->clock_limits[i].dcfclk_mhz; in fetch_socbb_params()
3552 mode_lib->vba.ReturnBusWidth * mode_lib->vba.DCFCLKPerState[i], in dml21_ModeSupportAndSystemConfigurationFull()3594 (mode_lib->vba.RoundTripPingLatencyCycles + 32.0) / mode_lib->vba.DCFCLKPerState[i] in dml21_ModeSupportAndSystemConfigurationFull()4983 mode_lib->vba.DCFCLKPerState[i], in dml21_ModeSupportAndSystemConfigurationFull()5209 mode_lib->vba.DCFCLK = mode_lib->vba.DCFCLKPerState[mode_lib->vba.VoltageLevel]; in dml21_ModeSupportAndSystemConfigurationFull()