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Searched refs:DCCRate (Results 1 – 5 of 5) sorted by relevance

/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/
H A Ddisplay_mode_vba.h322 double DCCRate[DC__NUM_DPP__MAX]; member
H A Damdgpu_display_mode_vba.c430 mode_lib->vba.DCCRate[mode_lib->vba.NumberOfActivePlanes] = src->dcc_rate; in fetch_pipe_params()
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/dcn20/
H A Damdgpu_display_mode_vba_20v2.c1627 / mode_lib->vba.DCCRate[k] in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1630 / mode_lib->vba.DCCRate[k] in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
H A Damdgpu_display_mode_vba_20.c1591 / mode_lib->vba.DCCRate[k] in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1594 / mode_lib->vba.DCCRate[k] in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/dcn21/
H A Damdgpu_display_mode_vba_21.c2743 dml_min(mode_lib->vba.DCCRate[k], DCCRateLimit); in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()