| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Lanai/ |
| H A D | LanaiInstrInfo.cpp | 284 MachineInstr &CmpInstr, Register SrcReg, Register SrcReg2, int /*CmpMask*/, in optimizeCompareInstr() argument
292 MachineBasicBlock::iterator I = CmpInstr, E = MI, in optimizeCompareInstr()
293 B = CmpInstr.getParent()->begin(); in optimizeCompareInstr()
307 else if (MI->getParent() != CmpInstr.getParent() || CmpValue != 0) { in optimizeCompareInstr()
311 if (CmpInstr.getOpcode() == Lanai::SFSUB_F_RI_LO) in optimizeCompareInstr()
330 if (isRedundantFlagInstr(&CmpInstr, SrcReg, SrcReg2, CmpValue, &*I)) { in optimizeCompareInstr()
353 I = CmpInstr; in optimizeCompareInstr()
354 E = CmpInstr.getParent()->end(); in optimizeCompareInstr()
420 MachineBasicBlock *MBB = CmpInstr.getParent(); in optimizeCompareInstr()
431 CmpInstr.eraseFromParent(); in optimizeCompareInstr()
|
| H A D | LanaiInstrInfo.h | 105 bool optimizeCompareInstr(MachineInstr &CmpInstr, Register SrcReg,
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrInfo.h | 234 bool optimizeCompareInstr(MachineInstr &CmpInstr, Register SrcReg,
344 bool substituteCmpToZero(MachineInstr &CmpInstr, unsigned SrcReg,
346 bool removeCmpToZeroOrOne(MachineInstr &CmpInstr, unsigned SrcReg,
|
| H A D | AArch64InstrInfo.cpp | 1436 MachineInstr &CmpInstr, Register SrcReg, Register SrcReg2, int CmpMask, in optimizeCompareInstr() argument
1438 assert(CmpInstr.getParent()); in optimizeCompareInstr()
1442 int DeadNZCVIdx = CmpInstr.findRegisterDefOperandIdx(AArch64::NZCV, true); in optimizeCompareInstr()
1444 if (CmpInstr.definesRegister(AArch64::WZR) || in optimizeCompareInstr()
1445 CmpInstr.definesRegister(AArch64::XZR)) { in optimizeCompareInstr()
1446 CmpInstr.eraseFromParent(); in optimizeCompareInstr()
1449 unsigned Opc = CmpInstr.getOpcode(); in optimizeCompareInstr()
1450 unsigned NewOpc = convertToNonFlagSettingOpc(CmpInstr); in optimizeCompareInstr()
1454 CmpInstr.setDesc(MCID); in optimizeCompareInstr()
1455 CmpInstr.RemoveOperand(DeadNZCVIdx); in optimizeCompareInstr()
[all …]
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.cpp | 2980 MachineInstr &CmpInstr, Register SrcReg, Register SrcReg2, int CmpMask, in optimizeCompareInstr() argument
2993 if (UI->getParent() != CmpInstr.getParent()) in optimizeCompareInstr()
3007 MachineBasicBlock::iterator I = CmpInstr, E = MI, in optimizeCompareInstr()
3008 B = CmpInstr.getParent()->begin(); in optimizeCompareInstr()
3022 else if (MI->getParent() != CmpInstr.getParent() || CmpValue != 0) { in optimizeCompareInstr()
3027 if (CmpInstr.getOpcode() == ARM::CMPri || in optimizeCompareInstr()
3028 CmpInstr.getOpcode() == ARM::t2CMPri || in optimizeCompareInstr()
3029 CmpInstr.getOpcode() == ARM::tCMPi8) in optimizeCompareInstr()
3064 E = CmpInstr; in optimizeCompareInstr()
3065 CmpInstr.getParent()->insert(E, MI); in optimizeCompareInstr()
[all …]
|
| H A D | ARMBaseInstrInfo.h | 299 bool optimizeCompareInstr(MachineInstr &CmpInstr, Register SrcReg,
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86InstrInfo.h | 515 bool optimizeCompareInstr(MachineInstr &CmpInstr, Register SrcReg,
|
| H A D | X86InstrInfo.cpp | 4139 bool X86InstrInfo::optimizeCompareInstr(MachineInstr &CmpInstr, Register SrcReg, in optimizeCompareInstr() argument
4144 switch (CmpInstr.getOpcode()) { in optimizeCompareInstr()
4161 if (!MRI->use_nodbg_empty(CmpInstr.getOperand(0).getReg())) in optimizeCompareInstr()
4165 switch (CmpInstr.getOpcode()) { in optimizeCompareInstr()
4183 CmpInstr.setDesc(get(NewOpcode)); in optimizeCompareInstr()
4184 CmpInstr.RemoveOperand(0); in optimizeCompareInstr()
4197 MachineBasicBlock::iterator I = CmpInstr, Def = MI; in optimizeCompareInstr()
4202 if (IsCmpZero && MI->getParent() != CmpInstr.getParent()) in optimizeCompareInstr()
4246 RE = CmpInstr.getParent() == MI->getParent() in optimizeCompareInstr()
4248 : CmpInstr.getParent()->rend(); in optimizeCompareInstr()
[all …]
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.cpp | 2357 bool PPCInstrInfo::optimizeCompareInstr(MachineInstr &CmpInstr, Register SrcReg, in optimizeCompareInstr() argument
2363 int OpC = CmpInstr.getOpcode(); in optimizeCompareInstr()
2364 Register CRReg = CmpInstr.getOperand(0).getReg(); in optimizeCompareInstr()
2439 MachineBasicBlock::iterator I = CmpInstr; in optimizeCompareInstr()
2442 for (MachineBasicBlock::iterator EL = CmpInstr.getParent()->end(); I != EL; in optimizeCompareInstr()
2471 else if (MI->getParent() != CmpInstr.getParent()) in optimizeCompareInstr()
2519 MachineBasicBlock::iterator E = MI, B = CmpInstr.getParent()->begin(); in optimizeCompareInstr()
2525 if (&*I != &CmpInstr && (Instr.modifiesRegister(PPC::CR0, TRI) || in optimizeCompareInstr()
2639 CmpInstr.eraseFromParent(); in optimizeCompareInstr()
|
| H A D | PPCInstrInfo.h | 524 bool optimizeCompareInstr(MachineInstr &CmpInstr, Register SrcReg,
|
| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/ |
| H A D | TargetInstrInfo.h | 1534 virtual bool optimizeCompareInstr(MachineInstr &CmpInstr, Register SrcReg, in optimizeCompareInstr() argument
|