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Searched refs:CarryRC (Results 1 – 4 of 4) sorted by relevance

/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
H A DSILoadStoreOptimizer.cpp1694 const auto *CarryRC = TRI->getRegClass(AMDGPU::SReg_1_XEXECRegClassID); in computeBase() local
1695 Register CarryReg = MRI->createVirtualRegister(CarryRC); in computeBase()
1696 Register DeadCarryReg = MRI->createVirtualRegister(CarryRC); in computeBase()
H A DSIInstrInfo.cpp5890 const auto *CarryRC = RI.getRegClass(AMDGPU::SReg_1_XEXECRegClassID); in moveToVALU() local
5893 if (!MRI.constrainRegClass(CarryInReg, CarryRC)) { in moveToVALU()
5894 Register NewCarryReg = MRI.createVirtualRegister(CarryRC); in moveToVALU()
6387 const auto *CarryRC = RI.getRegClass(AMDGPU::SReg_1_XEXECRegClassID); in splitScalar64BitAddSub() local
6393 Register CarryReg = MRI.createVirtualRegister(CarryRC); in splitScalar64BitAddSub()
6394 Register DeadCarryReg = MRI.createVirtualRegister(CarryRC); in splitScalar64BitAddSub()
H A DAMDGPUInstructionSelector.cpp369 const TargetRegisterClass *CarryRC = TRI.getWaveMaskRegClass(); in selectG_ADD_SUB() local
370 Register CarryReg = MRI->createVirtualRegister(CarryRC); in selectG_ADD_SUB()
377 .addDef(MRI->createVirtualRegister(CarryRC), RegState::Dead) in selectG_ADD_SUB()
H A DSIISelLowering.cpp3953 const auto *CarryRC = TRI->getRegClass(AMDGPU::SReg_1_XEXECRegClassID); in EmitInstrWithCustomInserter() local
3958 Register CarryReg = MRI.createVirtualRegister(CarryRC); in EmitInstrWithCustomInserter()
3959 Register DeadCarryReg = MRI.createVirtualRegister(CarryRC); in EmitInstrWithCustomInserter()