| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
| H A D | TargetFrameLoweringImpl.cpp | 96 const MCPhysReg *CSRegs = MF.getRegInfo().getCalleeSavedRegs(); in determineCalleeSaves() local
99 if (!CSRegs || CSRegs[0] == 0) in determineCalleeSaves()
122 for (unsigned i = 0; CSRegs[i]; ++i) { in determineCalleeSaves()
123 unsigned Reg = CSRegs[i]; in determineCalleeSaves()
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| H A D | RegUsageInfoCollector.cpp | 207 const MCPhysReg *CSRegs = TRI.getCalleeSavedRegs(&MF); in computeCalleeSavedRegs() local
208 for (unsigned i = 0; CSRegs[i]; ++i) { in computeCalleeSavedRegs()
209 MCPhysReg Reg = CSRegs[i]; in computeCalleeSavedRegs()
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| H A D | PrologEpilogInserter.cpp | 391 const MCPhysReg *CSRegs = F.getRegInfo().getCalleeSavedRegs(); in assignCalleeSavedSpillSlots() local
394 for (unsigned i = 0; CSRegs[i]; ++i) { in assignCalleeSavedSpillSlots()
395 unsigned Reg = CSRegs[i]; in assignCalleeSavedSpillSlots()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | GCNNSAReassign.cpp | 79 const MCPhysReg *CSRegs; member in __anon85ea4db40111::GCNNSAReassign
131 for (unsigned I = 0; CSRegs[I]; ++I) in canAssign()
132 if (TRI->isSubRegisterEq(Reg, CSRegs[I]) && in canAssign()
133 !LRM->isPhysRegUsed(CSRegs[I])) in canAssign()
241 CSRegs = MRI->getCalleeSavedRegs(); in runOnMachineFunction()
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| H A D | SILowerSGPRSpills.cpp | 216 const MCPhysReg *CSRegs = MRI.getCalleeSavedRegs(); in spillCalleeSavedRegs() local
218 for (unsigned I = 0; CSRegs[I]; ++I) { in spillCalleeSavedRegs()
219 MCRegister Reg = CSRegs[I]; in spillCalleeSavedRegs()
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| H A D | SIMachineFunctionInfo.cpp | 250 bool SIMachineFunctionInfo::isCalleeSavedReg(const MCPhysReg *CSRegs, in isCalleeSavedReg() argument
252 for (unsigned I = 0; CSRegs[I]; ++I) { in isCalleeSavedReg()
253 if (CSRegs[I] == Reg) in isCalleeSavedReg()
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| H A D | SIFrameLowering.cpp | 32 const MCPhysReg *CSRegs = MRI.getCalleeSavedRegs(); in findScratchNonCalleeSaveRegister() local
33 for (unsigned i = 0; CSRegs[i]; ++i) in findScratchNonCalleeSaveRegister()
34 LiveRegs.addReg(CSRegs[i]); in findScratchNonCalleeSaveRegister()
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| H A D | SIMachineFunctionInfo.h | 503 bool isCalleeSavedReg(const MCPhysReg *CSRegs, MCPhysReg Reg);
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | ARMBaseRegisterInfo.h | 93 const MCPhysReg *CSRegs) { in isCalleeSavedRegister() argument
94 for (unsigned i = 0; CSRegs[i]; ++i) in isCalleeSavedRegister()
95 if (Reg == CSRegs[i]) in isCalleeSavedRegister()
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| H A D | Thumb1FrameLowering.cpp | 457 static bool isCSRestore(MachineInstr &MI, const MCPhysReg *CSRegs) { in isCSRestore() argument
459 isCalleeSavedRegister(MI.getOperand(0).getReg(), CSRegs)) in isCSRestore()
487 const MCPhysReg *CSRegs = RegInfo->getCalleeSavedRegs(&MF); in emitEpilogue() local
500 while (MBBI != MBB.begin() && isCSRestore(*MBBI, CSRegs)); in emitEpilogue()
501 if (!isCSRestore(*MBBI, CSRegs)) in emitEpilogue()
661 const MCPhysReg *CSRegs = TRI.getCalleeSavedRegs(&MF); in emitPopSpecialFixUp() local
662 for (unsigned i = 0; CSRegs[i]; ++i) in emitPopSpecialFixUp()
663 UsedRegs.addReg(CSRegs[i]); in emitPopSpecialFixUp()
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| H A D | ARMFrameLowering.cpp | 1828 const MCPhysReg *CSRegs = RegInfo->getCalleeSavedRegs(&MF); in determineCalleeSaves() local
1829 for (unsigned i = 0; CSRegs[i]; ++i) { in determineCalleeSaves()
1830 unsigned Reg = CSRegs[i]; in determineCalleeSaves()
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| H A D | ARMBaseInstrInfo.cpp | 2559 const MCPhysReg *CSRegs = TRI->getCalleeSavedRegs(&MF); in tryFoldSPUpdateIntoPushPop() local
2581 if (isCalleeSavedRegister(CurReg, CSRegs) || in tryFoldSPUpdateIntoPushPop()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/ |
| H A D | SystemZFrameLowering.cpp | 172 const MCPhysReg *CSRegs = TRI->getCalleeSavedRegs(&MF); in determineCalleeSaves() local
173 for (unsigned I = 0; CSRegs[I]; ++I) { in determineCalleeSaves()
174 unsigned Reg = CSRegs[I]; in determineCalleeSaves()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/ |
| H A D | RISCVFrameLowering.cpp | 791 static const MCPhysReg CSRegs[] = { RISCV::X1, /* ra */ in determineCalleeSaves() local
798 for (unsigned i = 0; CSRegs[i]; ++i) in determineCalleeSaves()
799 SavedRegs.set(CSRegs[i]); in determineCalleeSaves()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
| H A D | PPCFrameLowering.cpp | 486 const MCPhysReg *CSRegs = RegInfo->getCalleeSavedRegs(MBB->getParent()); in findScratchRegister() local
496 for (int i = 0; CSRegs[i]; ++i) in findScratchRegister()
497 BV.reset(CSRegs[i]); in findScratchRegister()
2314 const MCPhysReg *CSRegs = RegInfo->getCalleeSavedRegs(&MF); in assignCalleeSavedSpillSlots() local
2315 for (unsigned i = 0; CSRegs[i]; ++i) in assignCalleeSavedSpillSlots()
2316 BVCalleeSaved.set(CSRegs[i]); in assignCalleeSavedSpillSlots()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | AArch64FrameLowering.cpp | 601 const MCPhysReg *CSRegs = MF->getRegInfo().getCalleeSavedRegs(); in findScratchNonCalleeSaveRegister() local
602 for (unsigned i = 0; CSRegs[i]; ++i) in findScratchNonCalleeSaveRegister()
603 LiveRegs.addReg(CSRegs[i]); in findScratchNonCalleeSaveRegister()
2743 const MCPhysReg *CSRegs = MF.getRegInfo().getCalleeSavedRegs(); in determineCalleeSaves() local
2751 for (unsigned i = 0; CSRegs[i]; ++i) { in determineCalleeSaves()
2752 const unsigned Reg = CSRegs[i]; in determineCalleeSaves()
2763 PairedReg = CSRegs[i ^ 1]; in determineCalleeSaves()
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