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Searched refs:CSR_WRITE (Results 1 – 18 of 18) sorted by relevance

/netbsd-src/sys/arch/sandpoint/stand/altboot/
H A Dwm.c50 #define CSR_WRITE(l, r, v) out32rb((l)->csr+(r), (v)) macro
148 CSR_WRITE(l, WMREG_TCTL, 0); in wm_init()
149 CSR_WRITE(l, WMREG_RCTL, 0); in wm_init()
188 CSR_WRITE(l, WMREG_TDBAH, 0); in wm_init()
189 CSR_WRITE(l, WMREG_TDBAL, VTOPHYS(txd)); in wm_init()
190 CSR_WRITE(l, WMREG_TDLEN, sizeof(l->txd)); in wm_init()
191 CSR_WRITE(l, WMREG_TDH, 0); in wm_init()
192 CSR_WRITE(l, WMREG_TDT, 0); in wm_init()
193 CSR_WRITE(l, WMREG_TIDV, 64); in wm_init()
194 CSR_WRITE(l, WMREG_TADV, 128); in wm_init()
[all …]
H A Dtlp.c48 #define CSR_WRITE(l, r, v) out32rb((l)->csr+(r), (v)) macro
140 CSR_WRITE(l, PAR_CSR0, PAR_SWR); in tlp_init()
145 CSR_WRITE(l, PAR_CSR0, PAR_DEFAULTS); in tlp_init()
148 CSR_WRITE(l, NAR_CSR6, l->omr); in tlp_init()
149 CSR_WRITE(l, SR_CSR5, ~0); in tlp_init()
150 CSR_WRITE(l, IER_CSR7, 0); in tlp_init()
192 CSR_WRITE(l, TDB_CSR4, VTOPHYS(txd)); in tlp_init()
193 CSR_WRITE(l, RDB_CSR3, VTOPHYS(rxd)); in tlp_init()
196 CSR_WRITE(l, NAR_CSR6, l->omr | NAR_TEN | NAR_REN); in tlp_init()
215 CSR_WRITE(l, TDR_CSR1, 01); in tlp_send()
[all …]
H A Dsip.c48 #define CSR_WRITE(l, r, v) out32rb((l)->csr+(r), (v)) macro
149 CSR_WRITE(l, SIP_IER, 0); in sip_init()
150 CSR_WRITE(l, SIP_IMR, 0); in sip_init()
151 CSR_WRITE(l, SIP_RFCR, 0); in sip_init()
152 CSR_WRITE(l, SIP_CR, CR_RST); in sip_init()
206 CSR_WRITE(l, SIP_RFCR, 0); in sip_init()
207 CSR_WRITE(l, SIP_RFDR, (en[1] << 8) | en[0]); in sip_init()
208 CSR_WRITE(l, SIP_RFCR, 2); in sip_init()
209 CSR_WRITE(l, SIP_RFDR, (en[3] << 8) | en[2]); in sip_init()
210 CSR_WRITE(l, SIP_RFCR, 4); in sip_init()
[all …]
H A Dsme.c48 #define CSR_WRITE(l, r, v) out32rb((l)->csr+(r), (v)) macro
170 CSR_WRITE(l, TXDBASE, VTOPHYS(txd)); in sme_init()
171 CSR_WRITE(l, RXDBASE, VTOPHYS(rxd)); in sme_init()
175 CSR_WRITE(l, BUSMODE, 0); in sme_init()
176 CSR_WRITE(l, DMACCTL, DMACCTL_ST | DMACCTL_SR); in sme_init()
177 CSR_WRITE(l, MAC_CR, val); /* (FDX), Tx/Rx enable */ in sme_init()
178 CSR_WRITE(l, RXPOLLD, 01); /* start receiving */ in sme_init()
197 CSR_WRITE(l, TXPOLLD, 01); /* start transmission */ in sme_send()
241 CSR_WRITE(l, RXPOLLD, 01); /* restart receiving */ in sme_recv()
254 CSR_WRITE(l, RXPOLLD, 01); /* necessary? */ in sme_recv()
[all …]
/netbsd-src/sys/arch/cobalt/stand/boot/
H A Dtlp.c52 #define CSR_WRITE(l, r, v) \ macro
198 CSR_WRITE(l, TLP_BMR, val | BMR_RST); in tlp_init()
200 CSR_WRITE(l, TLP_BMR, val); in tlp_init()
206 CSR_WRITE(l, TLP_CSR13, 0); in tlp_init()
208 CSR_WRITE(l, TLP_CSR15, SIAGEN_10BT); in tlp_init()
209 CSR_WRITE(l, TLP_CSR14, SIATXRX_10BT); in tlp_init()
210 CSR_WRITE(l, TLP_CSR13, SIACONN_10BT); in tlp_init()
213 CSR_WRITE(l, TLP_CSR15, SIAGEN_CWE | SIAGEN_MD0); in tlp_init()
215 CSR_WRITE(l, TLP_CSR15, SIAGEN_CWE); in tlp_init()
220 CSR_WRITE(l, TLP_OMR, l->omr); in tlp_init()
[all …]
H A Dns16550.c40 #define CSR_WRITE(base, reg, val) \ macro
52 CSR_WRITE(com_port, com_lctl, LCR_DLAB); in com_init()
54 CSR_WRITE(com_port, com_dlbl, speed); in com_init()
55 CSR_WRITE(com_port, com_dlbh, speed >> 8); in com_init()
57 CSR_WRITE(com_port, com_lctl, LCR_PNONE | LCR_8BITS); in com_init()
58 CSR_WRITE(com_port, com_mcr, MCR_RTS | MCR_DTR); in com_init()
59 CSR_WRITE(com_port, com_fifo, in com_init()
61 CSR_WRITE(com_port, com_ier, 0); in com_init()
74 CSR_WRITE(com_port, com_data, c); in com_putc()
H A Dlcd.c44 #define CSR_WRITE(base, reg, val) \ macro
109 CSR_WRITE(lcd_base, IREG, cmd_ddramset(HD_ROW1_ADDR + i)); in lcd_puts()
110 CSR_WRITE(lcd_base, DREG, message->row1[i]); in lcd_puts()
113 CSR_WRITE(lcd_base, IREG, cmd_ddramset(HD_ROW2_ADDR + i)); in lcd_puts()
114 CSR_WRITE(lcd_base, DREG, message->row2[i]); in lcd_puts()
/netbsd-src/sys/arch/mmeye/stand/boot/
H A Dcom.c103 #define CSR_WRITE(base, reg, val) \ macro
143 CSR_WRITE(com_port, com_lctl, LCR_DLAB); in com_init()
145 CSR_WRITE(com_port, com_dlbl, speed); in com_init()
146 CSR_WRITE(com_port, com_dlbh, speed >> 8); in com_init()
148 CSR_WRITE(com_port, com_lctl, LCR_PNONE | LCR_8BITS); in com_init()
149 CSR_WRITE(com_port, com_mcr, MCR_RTS | MCR_DTR); in com_init()
150 CSR_WRITE(com_port, com_fifo, in com_init()
152 CSR_WRITE(com_port, com_ier, 0); in com_init()
165 CSR_WRITE(com_port, com_data, c); in com_putc()
/netbsd-src/sys/dev/ic/
H A Ddp83932.c518 CSR_WRITE(sc, SONIC_CR, CR_TXP); in sonic_start()
585 CSR_WRITE(sc, SONIC_ISR, isr); /* ACK */ in sonic_intr()
859 CSR_WRITE(sc, SONIC_RWR, SONIC_CDRRADDR(sc, SONIC_PREVRX(i))); in sonic_rxintr()
875 CSR_WRITE(sc, SONIC_CR, CR_STP | CR_RXDIS | CR_HTX); in sonic_reset()
878 CSR_WRITE(sc, SONIC_CR, CR_RST); in sonic_reset()
882 CSR_WRITE(sc, SONIC_IMR, 0); in sonic_reset()
883 CSR_WRITE(sc, SONIC_ISR, IMR_ALL); in sonic_reset()
885 CSR_WRITE(sc, SONIC_CR, 0); in sonic_reset()
921 CSR_WRITE(sc, SONIC_CR, CR_RST); in sonic_init()
922 CSR_WRITE(sc, SONIC_DCR, reg); in sonic_init()
[all …]
H A Dpca9564.c60 #define CSR_WRITE(sc, r, v) (*sc->sc_ios.write_byte)(sc->sc_dev, r, v) macro
131 CSR_WRITE(sc, PCA9564_I2CCON, control); in pca9564_acquire_bus()
146 CSR_WRITE(sc, PCA9564_I2CCON, control); in pca9564_release_bus()
180 CSR_WRITE(sc, PCA9564_I2CCON, control); in pca9564_send_start()
196 CSR_WRITE(sc, PCA9564_I2CCON, control); in pca9564_send_stop()
220 CSR_WRITE(sc, PCA9564_I2CDAT, data); in pca9564_initiate_xfer()
223 CSR_WRITE(sc, PCA9564_I2CCON, control); in pca9564_initiate_xfer()
269 CSR_WRITE(sc, PCA9564_I2CDAT, byte); in pca9564_write_byte()
272 CSR_WRITE(sc, PCA9564_I2CCON, control); in pca9564_write_byte()
296 CSR_WRITE(sc, PCA9564_I2CCON, control); in pca9564_ack()
H A Ddp83932var.h211 #define CSR_WRITE(sc, reg, val) \ macro
/netbsd-src/sys/dev/pci/
H A Dif_wm.c793 #define CSR_WRITE(sc, reg, val) \ macro
1870 CSR_WRITE(sc, reg, regval); in wm_82575_write_8bit_ctlr_reg()
1970 CSR_WRITE(sc, rxq->rxq_rdt_reg, start); in wm_init_rxdesc()
2633 CSR_WRITE(sc, WMREG_SWSM2, reg | SWSM2_LOCK); in wm_attach()
2652 CSR_WRITE(sc, WMREG_SWSM, reg & ~SWSM_SMBI); in wm_attach()
2990 CSR_WRITE(sc, WMREG_CTRL, sc->sc_ctrl); in wm_attach()
2992 CSR_WRITE(sc, WMREG_CTRL_EXT, sc->sc_ctrl_ext); in wm_attach()
3069 CSR_WRITE(sc, WMREG_CTRL_EXT, reg); in wm_attach()
3083 CSR_WRITE(sc, WMREG_CTRL_EXT, reg); in wm_attach()
3771 CSR_WRITE(s in wm_resume()
[all...]
H A Dif_dge.c367 #define CSR_WRITE(sc, reg, val) \ macro
418 CSR_WRITE((sc), DGE_RDT, (x)); \
456 CSR_WRITE((sc), DGE_RDT, (x)); \
1373 CSR_WRITE(sc, DGE_TDT, nexttx);
1851 CSR_WRITE(sc, DGE_CTRL0, CTRL0_RST | sc->sc_ctrl0);
1869 CSR_WRITE(sc, DGE_CTRL1, CTRL1_EE_RST);
1922 CSR_WRITE(sc, DGE_TDBAH, ((uint64_t)DGE_CDTXADDR(sc, 0)) >> 32);
1923 CSR_WRITE(sc, DGE_TDBAL, DGE_CDTXADDR(sc, 0));
1924 CSR_WRITE(sc, DGE_TDLEN, sizeof(sc->sc_txdescs));
1925 CSR_WRITE(sc, DGE_TDH, 0);
[all …]
/netbsd-src/sys/arch/arm/sociox/
H A Dif_scx.c546 #define CSR_WRITE(sc,off,val) \ macro
620 CSR_WRITE(sc, MACCMD, reg | CMD_BUSY); in mac_read()
629 CSR_WRITE(sc, MACDATA, val); in mac_write()
630 CSR_WRITE(sc, MACCMD, reg | CMD_IOWR | CMD_BUSY); in mac_write()
1021 CSR_WRITE(sc, TDBA_LO, BUS_ADDR_LO32(p)); in scx_attach_i()
1022 CSR_WRITE(sc, TDBA_HI, BUS_ADDR_HI32(p)); in scx_attach_i()
1023 CSR_WRITE(sc, RDBA_LO, BUS_ADDR_LO32(q)); in scx_attach_i()
1024 CSR_WRITE(sc, RDBA_HI, BUS_ADDR_HI32(q)); in scx_attach_i()
1025 CSR_WRITE(sc, TXCONF, DESCNF_LE); /* little endian */ in scx_attach_i()
1026 CSR_WRITE(sc, RXCONF, DESCNF_LE); /* little endian */ in scx_attach_i()
[all …]
H A Dsni_i2c.c139 #define CSR_WRITE(sc, reg, val) \ macro
/netbsd-src/sys/arch/mac68k/obio/
H A Dif_sn_obio.c204 CSR_WRITE(sc, SONIC_CR, CR_RST); in sn_obio_getaddr_kludge()
207 CSR_WRITE(sc, SONIC_CEP, 15); in sn_obio_getaddr_kludge()
227 CSR_WRITE(sc, SONIC_CR, 0); in sn_obio_getaddr_kludge()
/netbsd-src/sys/arch/evbarm/stand/boot2440/
H A Dmain.c46 #define CSR_WRITE(reg, val) do { \ macro
475 CSR_WRITE(S3C2440_UART_BASE(0) + SSCOM_UTXH, c); in putchar()
608 CSR_WRITE(S3C2440_GPIO_BASE + GPIO_EINTMASK, ~0); in brdsetup()
638 CSR_WRITE(S3C2440_GPIO_BASE + 0x10 * (grp - 'A'), con); in iomux()
/netbsd-src/sys/arch/sandpoint/sandpoint/
H A Dsatmgr.c189 #define CSR_WRITE(t,r,v) bus_space_write_1((t)->sc_iot, (t)->sc_ioh, (r), (v)) macro
261 CSR_WRITE(sc, IER, 0x7f); /* all but MSR */ in satmgr_attach()
462 CSR_WRITE(sc, THR, *msg++); in send_sat_len()
715 CSR_WRITE(sc, THR, *sc->sc_wr_ptr); in startoutput()