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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Analysis/
H A DLoopCacheAnalysis.cpp151 unsigned CLS, in hasSpacialReuse() argument
193 bool InSameCacheLine = (Diff->getValue()->getSExtValue() < CLS); in hasSpacialReuse()
265 unsigned CLS) const { in computeRefCost()
291 if (isConsecutive(L, CLS)) { in computeRefCost()
295 const SCEV *CacheLineSize = SE.getConstant(Stride->getType(), CLS); in computeRefCost()
407 bool IndexedReference::isConsecutive(const Loop &L, unsigned CLS) const { in isConsecutive()
422 const SCEV *CacheLineSize = SE.getConstant(Stride->getType(), CLS); in isConsecutive()
543 unsigned CLS = TTI.getCacheLineSize(); in populateReferenceGroups() local
580 R->hasSpacialReuse(Representative, CLS, AA); in populateReferenceGroups()
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/Analysis/
H A DLoopCacheAnalysis.h73 Optional<bool> hasSpacialReuse(const IndexedReference &Other, unsigned CLS,
93 CacheCostTy computeRefCost(const Loop &L, unsigned CLS) const;
106 bool isConsecutive(const Loop &L, unsigned CLS) const;
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/
H A DSystemZPatterns.td19 // in which the first operand has class CLS and which the second operand
56 // Record that INSN performs insertion TYPE into a register of class CLS.
148 // registers in CLS against zero. The instruction has separate R1 and R2
157 // on registers of class CLS.
/netbsd-src/sys/rump/dev/lib/libmiiphy/
H A DMIIPHY.ioconf19 gentbi* at mii? phy ? # Generic Ten-Bit 1000BASE-[CLS]X PHYs
/netbsd-src/sys/arch/evbarm/conf/
H A DRPI136 gentbi* at mii? phy ? # Generic Ten-Bit 1000BASE-[CLS]X PHYs
H A DIXDP425199 gentbi* at mii? phy ? # Generic Ten-Bit 1000BASE-[CLS]X PHYs
H A DZAO425186 gentbi* at mii? phy ? # Generic Ten-Bit 1000BASE-[CLS]X PHYs
H A DHDL_G210 gentbi* at mii? phy ? # Generic Ten-Bit 1000BASE-[CLS]X PHYs
H A DTS7200240 #gentbi* at mii? phy ? # Generic Ten-Bit 1000BASE-[CLS]X PHYs
H A DMMNET_GENERIC329 #gentbi* at mii? phy ? # Generic Ten-Bit 1000BASE-[CLS]X PHYs
H A DGENERIC64314 gentbi* at mii? phy ? # Generic Ten-Bit 1000BASE-[CLS]X PHYs
H A DGENERIC327 gentbi* at mii? phy ? # Generic Ten-Bit 1000BASE-[CLS]X PHYs
H A DMPCSA_GENERIC386 #gentbi* at mii? phy ? # Generic Ten-Bit 1000BASE-[CLS]X PHYs
/netbsd-src/sys/arch/ibmnws/conf/
H A DGENERIC255 #gentbi* at mii? phy ? # Generic Ten-Bit 1000BASE-[CLS]X PHYs
/netbsd-src/sys/arch/evbppc/conf/
H A DOPENBLOCKS266_OPT107 gentbi* at mii? phy ? # Generic Ten-Bit 1000BASE-[CLS]X PHYs
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
H A DAArch64SchedTSV110.td406 def : InstRW<[TSV110Wr_1cyc_1ALUAB], (instregex "^(CLS|CLZ|RBIT|REV(16|32)?)(W|X)r$")>;
644 def : InstRW<[TSV110Wr_2cyc_1FSU1_1FSU2], (instregex "^(CLS|CLZ|CNT)v")>;
H A DAArch64SchedCyclone.td150 // CLS,CLZ,RBIT,REV,REV16,REV32
500 // CLS,CLZ,CNT,RBIT,REV16,REV32,REV64,XTN
H A DAArch64SchedFalkorDetails.td922 def : InstRW<[FalkorWr_1VXVY_2cyc], (instregex "^(CLS|CLZ|CNT|RBIT)(v2i32|v4i16|v8i8)$")>;
944 def : InstRW<[FalkorWr_2VXVY_2cyc], (instregex "^(CLS|CLZ|CNT|RBIT)(v4i32|v8i16|v16i8)$")>;
1207 def : InstRW<[FalkorWr_1XYZ_2cyc], (instregex "^(CLS|CLZ|RBIT|REV|REV16|REV32)(W|X)r$")>;
H A DAArch64SchedKryoDetails.td495 (instregex "(CLS|CLZ)(W|X)r")>;
501 (instregex "(CLS|CLZ|CNT)(v4i32|v8i16|v16i8)")>;
507 (instregex "(CLS|CLZ|CNT)(v2i32|v4i16|v8i8)")>;
H A DAArch64SchedThunderX2T99.td557 def : InstRW<[THX2T99Write_3Cyc_I1], (instregex "^CLS(W|X)r$",
1356 (instregex "(CLS|CLZ|CNT)(v4i32|v8i16|v16i8)")>;
H A DAArch64SchedThunderX3T110.td818 (instregex "^CLS(W|X)r$", "^CLZ(W|X)r$")>;
1464 (instregex "(CLS|CLZ|CNT)(v4i32|v8i16|v16i8)")>;
/netbsd-src/sys/arch/sgimips/conf/
H A DGENERIC32_IP3x208 gentbi* at mii? phy ? # Generic Ten-Bit 1000BASE-[CLS]X PHYs
/netbsd-src/distrib/acorn32/stand/BtNetBSD/!BtNetBSD/
H A DBtNetBSD56 COLOUR 128+4:CLS
60 COLOUR 128:CLS
/netbsd-src/sys/arch/ofppc/conf/
H A DGENERIC302 gentbi* at mii? phy ? # Generic Ten-Bit 1000BASE-[CLS]X PHYs
/netbsd-src/sys/arch/arc/conf/
H A DGENERIC353 #gentbi* at mii? phy ? # Generic Ten-Bit 1000BASE-[CLS]X PHYs

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