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Searched refs:CCVT (Results 1 – 9 of 9) sorted by relevance

/netbsd-src/external/apache2/llvm/dist/clang/lib/AST/
H A DComparisonCategories.cpp185 using CCVT = ComparisonCategoryResult; in getResultString() typedef
187 case CCVT::Equal: in getResultString()
189 case CCVT::Equivalent: in getResultString()
191 case CCVT::Less: in getResultString()
193 case CCVT::Greater: in getResultString()
195 case CCVT::Unordered: in getResultString()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
H A DDAGCombiner.cpp4117 EVT CCVT = getSetCCResultType(VT); in visitSDIV() local
4137 return DAG.getSelect(DL, VT, DAG.getSetCC(DL, CCVT, N0, N1, ISD::SETEQ), in visitSDIV()
4180 EVT CCVT = getSetCCResultType(VT); in visitSDIVLike() local
4230 SDValue IsOne = DAG.getSetCC(DL, CCVT, N1, One, ISD::SETEQ); in visitSDIVLike()
4231 SDValue IsAllOnes = DAG.getSetCC(DL, CCVT, N1, AllOnes, ISD::SETEQ); in visitSDIVLike()
4232 SDValue IsOneOrAllOnes = DAG.getNode(ISD::OR, DL, CCVT, IsOne, IsAllOnes); in visitSDIVLike()
4241 SDValue IsNeg = DAG.getSetCC(DL, CCVT, N1, Zero, ISD::SETLT); in visitSDIVLike()
4262 EVT CCVT = getSetCCResultType(VT); in visitUDIV() local
4278 return DAG.getSelect(DL, VT, DAG.getSetCC(DL, CCVT, N0, N1, ISD::SETEQ), in visitUDIV()
4362 EVT CCVT = getSetCCResultType(VT); in visitREM() local
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H A DSelectionDAGBuilder.cpp7097 EVT CCVT = EVT::getVectorVT(I.getContext(), MVT::i1, VecWidth); in visitIntrinsicCall() local
7103 ISD::UADDO, DL, DAG.getVTList(VecTy, CCVT), VectorIndex, VectorStep); in visitIntrinsicCall()
7105 SDValue SetCC = DAG.getSetCC(DL, CCVT, VectorInduction.getValue(0), in visitIntrinsicCall()
7107 setValue(&I, DAG.getNode(ISD::AND, DL, CCVT, in visitIntrinsicCall()
7108 DAG.getNOT(DL, VectorInduction.getValue(1), CCVT), in visitIntrinsicCall()
H A DLegalizeDAG.cpp3647 EVT CCVT = getSetCCResultType(CmpVT); in ExpandNode() local
3648 SDValue Cond = DAG.getNode(ISD::SETCC, dl, CCVT, Tmp1, Tmp2, CC, Node->getFlags()); in ExpandNode()
H A DTargetLowering.cpp5962 EVT CCVT = getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(), VT); in getSqrtInputTest() local
5974 return DAG.getSetCC(DL, CCVT, Fabs, NormC, ISD::SETLT); in getSqrtInputTest()
5977 return DAG.getSetCC(DL, CCVT, Op, FPZero, ISD::SETEQ); in getSqrtInputTest()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp7693 EVT CCVT = getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(), VT); in getSqrtInputTest() local
7695 return DAG.getSetCC(DL, CCVT, Op, FPZero, ISD::SETEQ); in getSqrtInputTest()
15392 EVT CCVT = N0.getValueType(); in performVSelectCombine() local
15428 CCVT.getVectorElementCount() != ElementCount::getFixed(1) || in performVSelectCombine()
15429 CCVT.getVectorElementType() != MVT::i1) in performVSelectCombine()
15485 EVT CCVT = SrcVT.changeVectorElementTypeToInteger(); in performSelectCombine() local
15490 if (CCVT.getSizeInBits() != ResVT.getSizeInBits()) in performSelectCombine()
15504 SDValue SetCC = DAG.getNode(ISD::SETCC, DL, CCVT, LHS, RHS, N0.getOperand(2)); in performSelectCombine()
15507 SmallVector<int, 8> DUPMask(CCVT.getVectorNumElements(), 0); in performSelectCombine()
15508 SDValue Mask = DAG.getVectorShuffle(CCVT, DL, SetCC, SetCC, DUPMask); in performSelectCombine()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelLowering.cpp2019 EVT CCVT = getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(), VT); in LowerUDIVREM() local
2021 SDValue Cond = DAG.getSetCC(DL, CCVT, R, Y, ISD::SETUGE); in LowerUDIVREM()
2028 Cond = DAG.getSetCC(DL, CCVT, R, Y, ISD::SETUGE); in LowerUDIVREM()
H A DSIISelLowering.cpp4702 EVT CCVT = EVT::getIntegerVT(*DAG.getContext(), WavefrontSize); in lowerICMPIntrinsic() local
4704 SDValue SetCC = DAG.getNode(AMDGPUISD::SETCC, DL, CCVT, LHS, RHS, in lowerICMPIntrinsic()
4706 if (VT.bitsEq(CCVT)) in lowerICMPIntrinsic()
4733 EVT CCVT = EVT::getIntegerVT(*DAG.getContext(), WavefrontSize); in lowerFCMPIntrinsic() local
4734 SDValue SetCC = DAG.getNode(AMDGPUISD::SETCC, SL, CCVT, Src0, in lowerFCMPIntrinsic()
4736 if (VT.bitsEq(CCVT)) in lowerFCMPIntrinsic()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp47922 EVT CCVT = VT.changeVectorElementType(MVT::i1); in combineToExtendBoolVectorInReg() local
47923 Vec = DAG.getSetCC(DL, CCVT, Vec, BitMask, ISD::SETEQ); in combineToExtendBoolVectorInReg()