| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/ |
| H A D | SystemZSelectionDAGInfo.cpp | 170 static SDValue addIPMSequence(const SDLoc &DL, SDValue CCReg, in addIPMSequence() argument
172 SDValue IPM = DAG.getNode(SystemZISD::IPM, DL, MVT::i32, CCReg); in addIPMSequence()
188 SDValue CCReg = emitCLC(DAG, DL, Chain, Src2, Src1, Bytes); in EmitTargetCodeForMemcmp() local
189 Chain = CCReg.getValue(1); in EmitTargetCodeForMemcmp()
190 return std::make_pair(addIPMSequence(DL, CCReg, DAG), Chain); in EmitTargetCodeForMemcmp()
208 SDValue CCReg = End.getValue(1); in EmitTargetCodeForMemchr() local
216 DAG.getTargetConstant(SystemZ::CCMASK_SRST_FOUND, DL, MVT::i32), CCReg}; in EmitTargetCodeForMemchr()
239 SDValue CCReg = Unused.getValue(1); in EmitTargetCodeForStrcmp() local
241 return std::make_pair(addIPMSequence(DL, CCReg, DAG), Chain); in EmitTargetCodeForStrcmp()
|
| H A D | SystemZISelLowering.cpp | 2701 static SDValue emitSETCC(SelectionDAG &DAG, const SDLoc &DL, SDValue CCReg, in emitSETCC() argument
2706 DAG.getTargetConstant(CCMask, DL, MVT::i32), CCReg}; in emitSETCC()
2926 SDValue CCReg = emitCmp(DAG, DL, C); in lowerSETCC() local
2927 return emitSETCC(DAG, DL, CCReg, C.CCValid, C.CCMask); in lowerSETCC()
2946 SDValue CCReg = emitCmp(DAG, DL, C); in lowerSTRICT_FSETCC() local
2947 CCReg->setFlags(Op->getFlags()); in lowerSTRICT_FSETCC()
2948 SDValue Result = emitSETCC(DAG, DL, CCReg, C.CCValid, C.CCMask); in lowerSTRICT_FSETCC()
2949 SDValue Ops[2] = { Result, CCReg.getValue(1) }; in lowerSTRICT_FSETCC()
2961 SDValue CCReg = emitCmp(DAG, DL, C); in lowerBR_CC() local
2965 DAG.getTargetConstant(C.CCMask, DL, MVT::i32), Dest, CCReg); in lowerBR_CC()
[all …]
|
| H A D | SystemZISelDAGToDAG.cpp | 1890 SDValue CCReg = Node->getOperand(4); in expandSelectBoolean() local
1892 SDValue Result = CurDAG->getNode(SystemZISD::IPM, DL, MVT::i32, CCReg); in expandSelectBoolean()
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | SIOptimizeExecMaskingPreRA.cpp | 178 Register CCReg = CC->getReg(); in optimizeVcndVcmpPair() local
182 if (isDefBetween(*TRI, LIS, CCReg, *Sel, *And)) in optimizeVcndVcmpPair()
193 .addReg(CCReg, getUndefRegState(CC->isUndef()), CC->getSubReg()); in optimizeVcndVcmpPair()
226 return CCReg; in optimizeVcndVcmpPair()
|
| H A D | AMDGPUInstructionSelector.cpp | 1038 Register CCReg = I.getOperand(0).getReg(); in selectG_ICMP() local
1039 if (!isVCC(CCReg, *MRI)) { in selectG_ICMP()
1046 BuildMI(*BB, &I, DL, TII.get(AMDGPU::COPY), CCReg) in selectG_ICMP()
1050 RBI.constrainGenericRegister(CCReg, AMDGPU::SReg_32RegClass, *MRI); in selectG_ICMP()
1772 Register CCReg = CCOp.getReg(); in selectG_SELECT() local
1773 if (!isVCC(CCReg, *MRI)) { in selectG_SELECT()
1777 .addReg(CCReg); in selectG_SELECT()
1782 if (!MRI->getRegClassOrNull(CCReg)) in selectG_SELECT()
1783 MRI->setRegClass(CCReg, TRI.getConstrainedRegClassForOperand(CCOp, *MRI)); in selectG_SELECT()
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/MCTargetDesc/ |
| H A D | PPCInstPrinter.cpp | 489 unsigned CCReg = MI->getOperand(OpNo).getReg(); in printcrbitm() local
491 switch (CCReg) { in printcrbitm()
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.h | 548 static inline MachineOperand condCodeOp(unsigned CCReg = 0) {
549 return MachineOperand::CreateReg(CCReg, false);
|
| H A D | ARMConstantIslandPass.cpp | 1703 Register CCReg = MI->getOperand(2).getReg(); in fixupConditionalBr() local
1760 .addMBB(NextBB).addImm(CC).addReg(CCReg); in fixupConditionalBr()
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelDAGToDAG.cpp | 4418 SDValue CCReg = SelectCC(LHS, RHS, CC, dl, Chain); in trySETCC() local
4420 CurDAG->ReplaceAllUsesOfValueWith(SDValue(N, 1), CCReg.getValue(1)); in trySETCC()
4433 CCReg = CurDAG->getCopyToReg(CurDAG->getEntryNode(), dl, CR7Reg, CCReg, in trySETCC()
4437 CCReg), 0); in trySETCC()
5430 SDValue CCReg = SelectCC(N->getOperand(0), N->getOperand(1), CC, dl); in Select() local
5446 SDValue CCBit = CurDAG->getTargetExtractSubreg(SRI, dl, MVT::i1, CCReg); in Select()
5494 SDValue Ops[] = { CCReg, N->getOperand(2), N->getOperand(3), in Select()
|