| /netbsd-src/external/gpl3/gdb/dist/sim/testsuite/bfin/ |
| H A D | c_logi2op_bittst.s | 20 CC = BITTST ( R0 , 0 ); /* cc = 0 */ define 22 R1 = CC; 23 CC = BITTST ( R0 , 0 ); /* cc = 1 */ define 24 R2 = CC; 26 CC = BITTST ( R0 , 0 ); /* cc = 1 */ define 27 R3 = CC; 29 CC = BITTST ( R0 , 0 ); /* cc = 1 */ define 30 R4 = CC; 37 CC = BITTST ( R1 , 1 ); /* cc = 0 */ define 38 R2 = CC; [all …]
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| H A D | c_logi2op_nbittst.s | 21 CC = ! BITTST( R0 , 0 ); /* cc = 0 */ define 23 R1 = CC; 24 CC = ! BITTST( R0 , 0 ); /* cc = 1 */ define 25 R2 = CC; 27 CC = ! BITTST( R0 , 0 ); /* cc = 1 */ define 28 R3 = CC; 30 CC = ! BITTST( R0 , 0 ); /* cc = 1 */ define 31 R4 = CC; 38 CC = ! BITTST( R1 , 1 ); /* cc = 0 */ define 39 R2 = CC; [all …]
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| H A D | a9.s | 18 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); define 19 CC = AN; R7 = CC; DBGA ( R7.L , 0x0 ); define 20 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); define 21 CC = V; R7 = CC; DBGA ( R7.L , 0x0 ); define 22 CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 ); define 32 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); define 33 CC = AN; R7 = CC; DBGA ( R7.L , 0x0 ); define 34 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); define 35 CC = V; R7 = CC; DBGA ( R7.L , 0x0 ); define 36 CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 ); define [all …]
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| H A D | s14.s | 23 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); define 24 CC = AN; R7 = CC; DBGA ( R7.L , 0x1 ); define 25 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); define 26 CC = AV0; R7 = CC; DBGA ( R7.L , 0x0 ); define 27 CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 ); define 39 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); define 40 CC = AN; R7 = CC; DBGA ( R7.L , 0x1 ); define 41 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); define 42 CC = AV0; R7 = CC; DBGA ( R7.L , 0x0 ); define 43 CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 ); define [all …]
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| H A D | a10.s | 19 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); define 20 CC = AN; R7 = CC; DBGA ( R7.L , 0x0 ); define 21 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); define 22 CC = V; R7 = CC; DBGA ( R7.L , 0x0 ); define 23 CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 ); define 33 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); define 34 CC = AN; R7 = CC; DBGA ( R7.L , 0x0 ); define 35 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); define 36 CC = V; R7 = CC; DBGA ( R7.L , 0x0 ); define 37 CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 ); define [all …]
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| H A D | c_ccflag_pr_imm3.s | 23 CC = P1 == 1; define 25 CC = P1 < 1; define 27 CC = P1 <= 1; define 29 CC = P2 == 2; define 31 CC = P2 < 2; define 33 CC = P2 <= 2; define 42 CC = P3 == 3; define 44 CC = P3 < 3; define 46 CC = P3 <= 3; define 48 CC = P4 == 1; define [all …]
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| H A D | s13.s | 18 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); define 19 CC = AN; R7 = CC; DBGA ( R7.L , 0x0 ); define 20 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); define 21 CC = AV0; R7 = CC; DBGA ( R7.L , 0x0 ); define 22 CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 ); define 33 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); define 34 CC = AN; R7 = CC; DBGA ( R7.L , 0x1 ); define 35 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); define 36 CC = AV0; R7 = CC; DBGA ( R7.L , 0x0 ); define 37 CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 ); define [all …]
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| H A D | s9.s | 17 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); define 18 CC = AN; R7 = CC; DBGA ( R7.L , 0x0 ); define 19 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); define 20 CC = AV0; R7 = CC; DBGA ( R7.L , 0x0 ); define 21 CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 ); define 30 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); define 31 CC = AN; R7 = CC; DBGA ( R7.L , 0x1 ); define 32 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); define 33 CC = AV0; R7 = CC; DBGA ( R7.L , 0x0 ); define 34 CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 ); define [all …]
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| H A D | s18.s | 21 CC = AZ; R7 = CC; DBGA ( R7.L , 0x1 ); define 22 CC = AN; R7 = CC; DBGA ( R7.L , 0x1 ); define 23 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); define 24 CC = AV0; R7 = CC; DBGA ( R7.L , 0x0 ); define 25 CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 ); define 36 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); define 37 CC = AN; R7 = CC; DBGA ( R7.L , 0x1 ); define 38 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); define 39 CC = AV0; R7 = CC; DBGA ( R7.L , 0x0 ); define 40 CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 ); define [all …]
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| H A D | s19.s | 22 CC = AZ; R7 = CC; DBGA ( R7.L , 0x1 ); define 23 CC = AN; R7 = CC; DBGA ( R7.L , 0x1 ); define 24 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); define 25 CC = AV0; R7 = CC; DBGA ( R7.L , 0x0 ); define 26 CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 ); define 38 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); define 39 CC = AN; R7 = CC; DBGA ( R7.L , 0x1 ); define 40 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); define 41 CC = AV0; R7 = CC; DBGA ( R7.L , 0x0 ); define 42 CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 ); define [all …]
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| H A D | a6.s | 22 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); define 23 CC = AN; R7 = CC; DBGA ( R7.L , 0x1 ); define 24 CC = V; R7 = CC; DBGA ( R7.L , 0x1 ); define 25 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); define 37 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); define 38 CC = AN; R7 = CC; DBGA ( R7.L , 0x0 ); define 39 CC = V; R7 = CC; DBGA ( R7.L , 0x1 ); define 40 CC = AC0; R7 = CC; DBGA ( R7.L , 0x1 ); define 52 CC = AZ; R5 = CC; DBGA ( R5.L , 0x1 ); define 53 CC = AN; R5 = CC; DBGA ( R5.L , 0x0 ); define [all …]
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| H A D | dsp_a4.s | 22 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); define 23 CC = AN; R7 = CC; DBGA ( R7.L , 0x1 ); define 24 CC = V; R7 = CC; DBGA ( R7.L , 0x1 ); define 25 CC = VS; R7 = CC; DBGA ( R7.L , 0x1 ); define 26 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); define 36 CC = AZ; R7 = CC; DBGA ( R7.L , 0x1 ); define 37 CC = AN; R7 = CC; DBGA ( R7.L , 0x0 ); define 38 CC = V; R7 = CC; DBGA ( R7.L , 0x1 ); define 39 CC = AC0; R7 = CC; DBGA ( R7.L , 0x1 ); define 51 CC = AZ; R7 = CC; DBGA ( R7.L , 0x1 ); define [all …]
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| H A D | a5.s | 25 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); define 26 CC = AN; R7 = CC; DBGA ( R7.L , 0x1 ); define 27 CC = V; R7 = CC; DBGA ( R7.L , 0x1 ); define 28 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); define 41 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); define 42 CC = AN; R7 = CC; DBGA ( R7.L , 0x0 ); define 43 CC = V; R7 = CC; DBGA ( R7.L , 0x1 ); define 44 CC = AC0; R7 = CC; DBGA ( R7.L , 0x1 ); define 57 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); define 58 CC = AN; R7 = CC; DBGA ( R7.L , 0x0 ); define [all …]
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| H A D | c_ccmv_cc_pr_pr.s | 18 IF CC P3 = P3; 19 IF CC P1 = P3; 20 IF CC P2 = P5; 21 IF CC P3 = P2; 22 CC = ! CC; define 23 IF CC P4 = SP; 24 IF CC P5 = P1; 25 IF CC SP = FP; 26 CC = ! CC; define 27 IF CC FP = P4; [all …]
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| H A D | c_ccmv_ncc_pr_pr.s | 18 IF !CC P3 = P3; 19 IF !CC P1 = P3; 20 CC = ! CC; define 21 IF !CC P2 = P5; 22 IF !CC P3 = P2; 23 IF !CC P4 = SP; 24 IF !CC P5 = P1; 25 IF !CC SP = FP; 26 CC = ! CC; define 27 IF !CC FP = P4; [all …]
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| H A D | c_ccflag_pr_imm3_uu.s | 25 CC = P1 == 1; define 27 CC = P1 < 1 (IU); define 29 CC = P1 <= 1 (IU); define 31 CC = P2 == 2; define 33 CC = P2 < 2 (IU); define 35 CC = P2 <= 2 (IU); define 44 CC = P3 == 3; define 46 CC = P3 < 3 (IU); define 48 CC = P3 <= 3 (IU); define 50 CC = P4 == 3; define [all …]
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| H A D | c_ccmv_ncc_dr_dr.s | 19 IF !CC R0 = R0; 20 IF !CC R1 = R3; 21 IF !CC R2 = R5; 22 IF !CC R3 = R2; 23 CC = ! CC; define 24 IF !CC R4 = R6; 25 IF !CC R5 = R1; 26 IF !CC R6 = R7; 27 CC = ! CC; define 28 IF !CC R7 = R4; [all …]
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| H A D | c_ccmv_cc_dr_dr.s | 20 IF CC R0 = R0; 21 IF CC R1 = R3; 22 IF CC R2 = R5; 23 IF CC R3 = R2; 24 CC = ! CC; define 25 IF CC R4 = R6; 26 IF CC R5 = R1; 27 IF CC R6 = R7; 28 CC = ! CC; define 29 IF CC R7 = R4; [all …]
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| H A D | m2.s | 36 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); define 37 CC = AN; R7 = CC; DBGA ( R7.L , 0x0 ); define 38 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); define 39 CC = AV0; R7 = CC; DBGA ( R7.L , 0x0 ); define 40 CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 ); define 67 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); define 68 CC = AN; R7 = CC; DBGA ( R7.L , 0x0 ); define 69 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); define 70 CC = AV0; R7 = CC; DBGA ( R7.L , 0x0 ); define 71 CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 ); define [all …]
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| H A D | s4.s | 36 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); define 37 CC = AN; R7 = CC; DBGA ( R7.L , 0x1 ); define 38 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); define 39 CC = AV0; R7 = CC; DBGA ( R7.L , 0x0 ); define 40 CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 ); define 48 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); define 49 CC = AN; R7 = CC; DBGA ( R7.L , 0x0 ); define 50 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); define 51 CC = AV0; R7 = CC; DBGA ( R7.L , 0x0 ); define 52 CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 ); define [all …]
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| H A D | dsp_a7.s | 23 CC = AZ; R7 = CC; DBGA ( R7.L , 0x1 ); define 24 CC = AN; R7 = CC; DBGA ( R7.L , 0x0 ); define 25 CC = V; R7 = CC; DBGA ( R7.L , 0x0 ); define 26 CC = AC0; R7 = CC; DBGA ( R7.L , 0x1 ); define 38 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); define 39 CC = AN; R7 = CC; DBGA ( R7.L , 0x0 ); define 40 CC = V; R7 = CC; DBGA ( R7.L , 0x1 ); define 41 CC = AC0; R7 = CC; DBGA ( R7.L , 0x1 ); define 53 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); define 54 CC = AN; R7 = CC; DBGA ( R7.L , 0x1 ); define [all …]
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| H A D | c_cc2stat_cc_an.s | 22 CC = AN; // define 23 R0 = CC; // 27 CC = AN; // define 28 R1 = CC; // 32 CC = AN; // define 33 R2 = CC; // 37 CC = AN; // define 38 R3 = CC; // 43 CC |= AN; // label 44 R4 = CC; // [all …]
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| H A D | c_cc2stat_cc_az.s | 22 CC = AZ; // define 23 R0 = CC; // 27 CC = AZ; // define 28 R1 = CC; // 32 CC = AZ; // define 33 R2 = CC; // 37 CC = AZ; // define 38 R3 = CC; // 43 CC |= AZ; // label 44 R4 = CC; // [all …]
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| H A D | c_cc2stat_cc_aq.s | 22 CC = AQ; // define 23 R0 = CC; // 27 CC = AQ; // define 28 R1 = CC; // 32 CC = AQ; // define 33 R2 = CC; // 37 CC = AQ; // define 38 R3 = CC; // 43 CC |= AQ; // label 44 R4 = CC; // [all …]
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| /netbsd-src/external/gpl2/xcvs/dist/src/ |
| H A D | build_src.com | 2 $ CC :== CC/NOOPT/DEB/STANDARD=VAXC/DEFINE=HAVE_CONFIG_H- 4 $ CC add.c 5 $ CC admin.c 6 $ CC annotate.c 7 $ CC buffer.c 8 $ CC checkin.c 9 $ CC checkout.c 10 $ CC classify.c 11 $ CC client.c 12 $ CC commit.c [all …]
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