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/netbsd-src/external/gpl3/binutils/dist/opcodes/
H A Di386-opc.tbl187 …|No_sSuf|HLEPrefixRelease, { Reg8|Reg16|Reg32|Reg64, Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex }
191 …LEPrefixRelease|Optimize, { Imm8|Imm16|Imm32|Imm32S, Reg8|Reg16|Reg32|Reg64|Unspecified|BaseIndex }
200 …, 0x8c, 0, D|Modrm|IgnoreSize|No_bSuf|No_lSuf|No_sSuf|No_qSuf, { SReg, Word|Unspecified|BaseIndex }
211 …|Modrm|CheckOperandSize|No_bSuf|No_sSuf, { Word|Dword|Qword|Unspecified|BaseIndex, Reg16|Reg32|Reg…
212 …ckOperandSize|No_bSuf|No_sSuf|EVexMap4, { Reg16|Reg32|Reg64|Unspecified|BaseIndex, Reg16|Reg32|Reg…
215 movsb, 0xfbe, i386, Modrm|No_bSuf|No_sSuf, { Reg8|Unspecified|BaseIndex, Reg16|Reg32|Reg64 }
216 movsw, 0xfbf, i386, Modrm|No_bSuf|No_wSuf|No_sSuf, { Reg16|Unspecified|BaseIndex, Reg32|Reg64 }
217 movsl, 0x63, x64, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf, { Reg32|Unspecified|BaseIndex, Reg64 }
218 movsx, 0xfbe, i386, W|Modrm|No_lSuf|No_sSuf|No_qSuf, { Reg8|Reg16|Unspecified|BaseIndex, Reg16|Reg3…
219 movsx, 0x63, x64, Modrm|No_bSuf|No_wSuf|No_sSuf|No_qSuf, { Reg32|Unspecified|BaseIndex, Reg32|Reg64…
[all …]
H A Di386-reg.tbl69 bx, Class=Reg|Word|BaseIndex, 0, 3, Dw2Inval, Dw2Inval
71 bp, Class=Reg|Word|BaseIndex, 0, 5, Dw2Inval, Dw2Inval
72 si, Class=Reg|Word|BaseIndex, 0, 6, Dw2Inval, Dw2Inval
73 di, Class=Reg|Word|BaseIndex, 0, 7, Dw2Inval, Dw2Inval
99 eax, Class=Reg|Instance=Accum|Dword|BaseIndex, 0, 0, 0, Dw2Inval
100 ecx, Class=Reg|Instance=RegC|Dword|BaseIndex, 0, 1, 1, Dw2Inval
101 edx, Class=Reg|Instance=RegD|Dword|BaseIndex, 0, 2, 2, Dw2Inval
102 ebx, Class=Reg|Instance=RegB|Dword|BaseIndex, 0, 3, 3, Dw2Inval
104 ebp, Class=Reg|Dword|BaseIndex, 0, 5, 5, Dw2Inval
105 esi, Class=Reg|Dword|BaseIndex, 0, 6, 6, Dw2Inval
[all …]
H A Di386-opc.h870 BaseIndex, enumerator
H A Di386-gen.c538 BITFIELD (BaseIndex),
H A DChangeLog-2017206 BaseIndex and emit DispN accordingly.
211 all insns operands having BaseIndex set.
H A DChangeLog-20181252 (rip): Use Qword instead of BaseIndex. Use RegIP.
1253 (eip): Use Dword instead of BaseIndex. Use RegIP.
/netbsd-src/external/gpl3/binutils.old/dist/opcodes/
H A Di386-opc.tbl134 …ase, { Reg8|Reg16|Reg32|Reg64, Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex }
135 …Suf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|HLEPrefixRelease, { Reg64, Reg64|Unspecified|Qword|BaseIndex }
139 …ze, { Imm8|Imm16|Imm32|Imm32S, Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex }
140 …f|No_sSuf|No_qSuf|No_ldSuf|HLEPrefixRelease|Optimize, { Imm32S, Reg64|Qword|Unspecified|BaseIndex }
150 …, D|Modrm|IgnoreSize|No_bSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { SReg, Word|Unspecified|BaseIndex }
164 …puMovbe, Modrm|No_bSuf|No_sSuf|No_ldSuf, { Word|Dword|Qword|Unspecified|BaseIndex, Reg16|Reg32|Reg…
165 …ovbe, Modrm|No_bSuf|No_sSuf|No_ldSuf, { Reg16|Reg32|Reg64, Word|Dword|Qword|Unspecified|BaseIndex }
170 … Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Reg8|Byte|Unspecified|BaseIndex, Reg32 }
171 … Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Reg8|Byte|Unspecified|BaseIndex, Reg16 }
172 …Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Reg16|Word|Unspecified|BaseIndex, Reg32 }
[all …]
H A Di386-reg.tbl50 bx, Class=Reg|Word|BaseIndex, 0, 3, Dw2Inval, Dw2Inval
52 bp, Class=Reg|Word|BaseIndex, 0, 5, Dw2Inval, Dw2Inval
53 si, Class=Reg|Word|BaseIndex, 0, 6, Dw2Inval, Dw2Inval
54 di, Class=Reg|Word|BaseIndex, 0, 7, Dw2Inval, Dw2Inval
64 eax, Class=Reg|Instance=Accum|Dword|BaseIndex, 0, 0, 0, Dw2Inval
65 ecx, Class=Reg|Instance=RegC|Dword|BaseIndex, 0, 1, 1, Dw2Inval
66 edx, Class=Reg|Instance=RegD|Dword|BaseIndex, 0, 2, 2, Dw2Inval
67 ebx, Class=Reg|Instance=RegB|Dword|BaseIndex, 0, 3, 3, Dw2Inval
69 ebp, Class=Reg|Dword|BaseIndex, 0, 5, 5, Dw2Inval
70 esi, Class=Reg|Dword|BaseIndex, 0, 6, 6, Dw2Inval
[all …]
H A Di386-opc.h840 BaseIndex, enumerator
H A Di386-gen.c783 BITFIELD (BaseIndex),
H A DChangeLog-2017206 BaseIndex and emit DispN accordingly.
211 all insns operands having BaseIndex set.
H A DChangeLog-20181252 (rip): Use Qword instead of BaseIndex. Use RegIP.
1253 (eip): Use Dword instead of BaseIndex. Use RegIP.
/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/
H A DVirtRegMap.cpp375 SlotIndex BaseIndex = LIS->getInstructionIndex(MI); in readsUndefSubreg() local
378 assert(LI.liveAt(BaseIndex) && in readsUndefSubreg()
385 if ((SR.LaneMask & UseMask).any() && SR.liveAt(BaseIndex)) in readsUndefSubreg()
H A DCodeGenPrepare.cpp5941 Value *BaseIndex = ConstantInt::get(IntPtrTy, BaseOffset); in splitLargeGEPOffsets() local
5946 NewBaseBuilder.CreateGEP(I8Ty, NewBaseGEP, BaseIndex, "splitgep"); in splitLargeGEPOffsets()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Transforms/Vectorize/
H A DSLPVectorizer.cpp409 unsigned BaseIndex = 0) { in getSameOpcode() argument
412 return InstructionsState(VL[BaseIndex], nullptr, nullptr); in getSameOpcode()
414 bool IsCastOp = isa<CastInst>(VL[BaseIndex]); in getSameOpcode()
415 bool IsBinOp = isa<BinaryOperator>(VL[BaseIndex]); in getSameOpcode()
416 unsigned Opcode = cast<Instruction>(VL[BaseIndex])->getOpcode(); in getSameOpcode()
418 unsigned AltIndex = BaseIndex; in getSameOpcode()
434 Type *Ty0 = cast<Instruction>(VL[BaseIndex])->getOperand(0)->getType(); in getSameOpcode()
450 return InstructionsState(VL[BaseIndex], nullptr, nullptr); in getSameOpcode()
453 return InstructionsState(VL[BaseIndex], cast<Instruction>(VL[BaseIndex]), in getSameOpcode()
/netbsd-src/external/apache2/llvm/dist/clang/lib/AST/
H A DMicrosoftMangle.cpp1780 unsigned BaseIndex = 0; in mangleTemplateArgValue() local
1782 mangleTemplateArgValue(B.getType(), V.getStructBase(BaseIndex++)); in mangleTemplateArgValue()
/netbsd-src/external/gpl3/gdb/dist/opcodes/
H A DChangeLog-2017206 BaseIndex and emit DispN accordingly.
211 all insns operands having BaseIndex set.
H A DChangeLog-20181252 (rip): Use Qword instead of BaseIndex. Use RegIP.
1253 (eip): Use Dword instead of BaseIndex. Use RegIP.
/netbsd-src/external/gpl3/gdb.old/dist/opcodes/
H A DChangeLog-2017206 BaseIndex and emit DispN accordingly.
211 all insns operands having BaseIndex set.
H A DChangeLog-20181252 (rip): Use Qword instead of BaseIndex. Use RegIP.
1253 (eip): Use Dword instead of BaseIndex. Use RegIP.
/netbsd-src/external/gpl3/binutils/dist/include/opcode/
H A DChangeLog-91031533 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
1538 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
1560 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
/netbsd-src/external/gpl3/gdb/dist/include/opcode/
H A DChangeLog-91031533 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
1538 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
1560 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
/netbsd-src/external/gpl3/binutils.old/dist/include/opcode/
H A DChangeLog-91031533 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
1538 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
1560 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
/netbsd-src/external/gpl3/gdb.old/dist/include/opcode/
H A DChangeLog-91031533 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
1538 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
1560 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
/netbsd-src/external/apache2/llvm/dist/llvm/lib/IR/
H A DVerifier.cpp4967 const uint64_t BaseIndex = cast<ConstantInt>(Base)->getZExtValue(); in visitIntrinsicCall() local
4972 Assert(BaseIndex < Opt->Inputs.size(), in visitIntrinsicCall()

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