Home
last modified time | relevance | path

Searched refs:BYPASS (Results 1 – 15 of 15) sorted by relevance

/netbsd-src/external/gpl3/gcc/dist/gcc/config/arc/
H A DarcHS4x.md130 ;; BYPASS Advanced ALU ->
148 ;; BYPASS Basic ALU ->
158 ;; BYPASS LD ->
167 ;; BYPASS FAST MPY ->
175 ;; BYPASS SLOW MPY ->
183 ;;BYPASS FPU ->
191 ;;BYPASS FPU FUSE ->
199 ;;BYPASS FPU SP DIV ->
207 ;;BYPASS FPU DP DIV ->
215 ;;BYPASS FPU CVT ->
H A DarcHS.md65 ;; BYPASS Advanced ALU ->
74 ;; BYPASS Basic ALU ->
80 ;; BYPASS LD ->
87 ;; BYPASS MPY ->
/netbsd-src/external/gpl3/gcc.old/dist/gcc/config/arc/
H A DarcHS4x.md130 ;; BYPASS Advanced ALU ->
148 ;; BYPASS Basic ALU ->
158 ;; BYPASS LD ->
167 ;; BYPASS FAST MPY ->
175 ;; BYPASS SLOW MPY ->
183 ;;BYPASS FPU ->
191 ;;BYPASS FPU FUSE ->
199 ;;BYPASS FPU SP DIV ->
207 ;;BYPASS FPU DP DIV ->
215 ;;BYPASS FPU CVT ->
H A DarcHS.md65 ;; BYPASS Advanced ALU ->
74 ;; BYPASS Basic ALU ->
80 ;; BYPASS LD ->
87 ;; BYPASS MPY ->
/netbsd-src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/
H A Dstih407-pinctrl.dtsi224 mdio = <&pio1 0 ALT1 OUT BYPASS 0>;
226 mdint = <&pio1 3 ALT1 IN BYPASS 0>;
232 mdio = <&pio1 0 ALT1 OUT BYPASS 0>;
246 col = <&pio0 7 ALT1 IN BYPASS 1000>;
248 mdio = <&pio1 0 ALT1 OUT BYPASS 1500>;
250 crs = <&pio1 2 ALT1 IN BYPASS 1000>;
251 mdint = <&pio1 3 ALT1 IN BYPASS 0>;
269 mdio = <&pio1 0 ALT1 OUT BYPASS 0>;
271 mdint = <&pio1 3 ALT1 IN BYPASS 0>;
501 sd_cmd = <&pio19 2 ALT5 BIDIR_PU BYPASS 0>;
[all …]
H A Dst-pincfg.h48 #define BYPASS (0) macro
/netbsd-src/sys/arch/arm/nxp/
H A Dimx6_clk.c1031 CLK_MUX("pll1_bypass", pll1_bypass_p, CCM_ANALOG, PLL_ARM, BYPASS),
1032 CLK_MUX("pll2_bypass", pll2_bypass_p, CCM_ANALOG, PLL_SYS, BYPASS),
1033 CLK_MUX("pll3_bypass", pll3_bypass_p, CCM_ANALOG, PLL_USB1, BYPASS),
1034 CLK_MUX("pll4_bypass", pll4_bypass_p, CCM_ANALOG, PLL_AUDIO, BYPASS),
1035 CLK_MUX("pll5_bypass", pll5_bypass_p, CCM_ANALOG, PLL_VIDEO, BYPASS),
1036 CLK_MUX("pll6_bypass", pll6_bypass_p, CCM_ANALOG, PLL_ENET, BYPASS),
1037 CLK_MUX("pll7_bypass", pll7_bypass_p, CCM_ANALOG, PLL_USB2, BYPASS),
H A Dimx6sx_clk.c1121 CLK_MUX("pll1_bypass", pll1_bypass_p, CCM_ANALOG, PLL_ARM, BYPASS),
1122 CLK_MUX("pll2_bypass", pll2_bypass_p, CCM_ANALOG, PLL_SYS, BYPASS),
1123 CLK_MUX("pll3_bypass", pll3_bypass_p, CCM_ANALOG, PLL_USB1, BYPASS),
1124 CLK_MUX("pll4_bypass", pll4_bypass_p, CCM_ANALOG, PLL_AUDIO, BYPASS),
1125 CLK_MUX("pll5_bypass", pll5_bypass_p, CCM_ANALOG, PLL_VIDEO, BYPASS),
1126 CLK_MUX("pll6_bypass", pll6_bypass_p, CCM_ANALOG, PLL_ENET, BYPASS),
1127 CLK_MUX("pll7_bypass", pll7_bypass_p, CCM_ANALOG, PLL_USB2, BYPASS),
/netbsd-src/sys/external/bsd/drm2/dist/drm/radeon/
H A Drv740d.h61 #define BYPASS (1 << 19) macro
H A Dradeon_rv740_dpm.c353 mpll_dq_func_cntl_2 |= BYPASS | BIAS_GEN_PDNB | RESET_EN; in rv740_populate_smc_acpi_state()
H A Drv770d.h134 #define BYPASS (1 << 19) macro
H A Dnid.h576 #define BYPASS (1 << 19) macro
H A Devergreend.h114 #define BYPASS (1 << 19) macro
H A Dradeon_cypress_dpm.c1403 mpll_dq_func_cntl_2 |= BIAS_GEN_PDNB | RESET_EN | BYPASS; in cypress_populate_smc_acpi_state()
H A Dradeon_ni_dpm.c1876 mpll_dq_func_cntl_2 |= BIAS_GEN_PDNB | RESET_EN | BYPASS; in ni_populate_smc_acpi_state()