| /netbsd-src/bin/ksh/ |
| H A D | table.h | 37 #define ALLOC BIT(0) /* val.s has been allocated */ 38 #define DEFINED BIT(1) /* is defined in block */ 39 #define ISSET BIT(2) /* has value, vp->val.[si] */ 40 #define EXPORT BIT(3) /* exported variable/function */ 41 #define TRACE BIT(4) /* var: user flagged, func: execution tracing */ 44 #define SPECIAL BIT(8) /* PATH, IFS, SECONDS, etc */ 45 #define INTEGER BIT(9) /* val.i contains integer value */ 46 #define RDONLY BIT(10) /* read-only variable */ 47 #define LOCAL BIT(11) /* for local typeset() */ 48 #define ARRAY BIT(13) /* array */ [all …]
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| H A D | tree.h | 94 #define IOEVAL BIT(4) /* expand in << */ 95 #define IOSKIP BIT(5) /* <<-, skip ^\t* */ 96 #define IOCLOB BIT(6) /* >|, override -o noclobber */ 97 #define IORDUP BIT(7) /* x<&y (as opposed to x>&y) */ 98 #define IONAMEXP BIT(8) /* name has been expanded */ 101 #define XEXEC BIT(0) /* execute without forking */ 102 #define XFORK BIT(1) /* fork before executing */ 103 #define XBGND BIT(2) /* command & */ 104 #define XPIPEI BIT(3) /* input is pipe */ 105 #define XPIPEO BIT(4) /* output is pipe */ [all …]
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| H A D | sh.h | 159 #define BIT(i) (1<<(i)) /* define bit in flag */ macro 236 #define EF_FUNC_PARSE BIT(0) /* function being parsed */ 237 #define EF_BRKCONT_PASS BIT(1) /* set if E_LOOP must pass break/continue on */ 238 #define EF_FAKE_SIGDIE BIT(2) /* hack to get info from unwind to quitenv */ 370 #define TF_SHELL_USES BIT(0) /* shell uses signal, user can't change */ 371 #define TF_USER_SET BIT(1) /* user has (tried to) set trap */ 372 #define TF_ORIG_IGN BIT(2) /* original action was SIG_IGN */ 373 #define TF_ORIG_DFL BIT(3) /* original action was SIG_DFL */ 374 #define TF_EXEC_IGN BIT(4) /* restore SIG_IGN just before exec */ 375 #define TF_EXEC_DFL BIT(5) /* restore SIG_DFL just before exec */ [all …]
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| H A D | lex.h | 45 #define SF_ECHO BIT(0) /* echo input to shlout */ 46 #define SF_ALIAS BIT(1) /* faking space at end of alias */ 47 #define SF_ALIASEND BIT(2) /* faking space at end of alias */ 48 #define SF_TTY BIT(3) /* type == SSTDIN & it is a tty */ 108 #define CONTIN BIT(0) /* skip new lines to complete command */ 109 #define ONEWORD BIT(1) /* single word for substitute() */ 110 #define ALIAS BIT(2) /* recognize alias */ 111 #define KEYWORD BIT(3) /* recognize keywords */ 112 #define LETEXPR BIT(4) /* get expression inside (( )) */ 113 #define VARASN BIT(5) /* check for var=word */ [all …]
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| /netbsd-src/sys/dev/pci/ |
| H A D | voodoofbreg.h | 197 #define BIT(x) (1UL << (x)) macro 204 #define AUTOINC_DSTX BIT(10) 205 #define AUTOINC_DSTY BIT(11) 209 #define SST_2D_GO BIT(8) 212 #define STATUS_RETRACE BIT(6) 213 #define STATUS_BUSY BIT(9) 214 #define MISCINIT1_CLUT_INV BIT(0) 215 #define MISCINIT1_2DBLOCK_DIS BIT(15) 216 #define DRAMINIT0_SGRAM_NUM BIT(26) 217 #define DRAMINIT0_SGRAM_TYPE BIT(27) [all …]
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/i915/ |
| H A D | i915_pci.c | 43 #define GEN(x) .gen = (x), .gen_mask = BIT((x) - 1) 166 .pipe_mask = BIT(PIPE_A) | BIT(PIPE_B), \ 174 .engine_mask = BIT(RCS0), \ 185 .pipe_mask = BIT(PIPE_A), \ 192 .engine_mask = BIT(RCS0), \ 224 .pipe_mask = BIT(PIPE_A) | BIT(PIPE_B), \ 227 .engine_mask = BIT(RCS0), \ 309 .pipe_mask = BIT(PIPE_A) | BIT(PIPE_B), \ 313 .engine_mask = BIT(RCS0), \ 344 .engine_mask = BIT(RCS0) | BIT(VCS0), [all …]
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| H A D | intel_sideband.h | 41 vlv_iosf_sb_get(i915, BIT(VLV_IOSF_SB_BUNIT)); in vlv_bunit_get() 49 vlv_iosf_sb_put(i915, BIT(VLV_IOSF_SB_BUNIT)); in vlv_bunit_put() 54 vlv_iosf_sb_get(i915, BIT(VLV_IOSF_SB_CCK)); in vlv_cck_get() 62 vlv_iosf_sb_put(i915, BIT(VLV_IOSF_SB_CCK)); in vlv_cck_put() 67 vlv_iosf_sb_get(i915, BIT(VLV_IOSF_SB_CCU)); in vlv_ccu_get() 75 vlv_iosf_sb_put(i915, BIT(VLV_IOSF_SB_CCU)); in vlv_ccu_put() 80 vlv_iosf_sb_get(i915, BIT(VLV_IOSF_SB_DPIO)); in vlv_dpio_get() 89 vlv_iosf_sb_put(i915, BIT(VLV_IOSF_SB_DPIO)); in vlv_dpio_put() 94 vlv_iosf_sb_get(i915, BIT(VLV_IOSF_SB_FLISDSI)); in vlv_flisdsi_get() 102 vlv_iosf_sb_put(i915, BIT(VLV_IOSF_SB_FLISDSI)); in vlv_flisdsi_put() [all …]
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| H A D | intel_device_info.c | 221 if ((s_en & BIT(s)) == 0) in gen11_compute_sseu_info() 224 sseu->slice_mask |= BIT(s); in gen11_compute_sseu_info() 259 if (eu_en_fuse & BIT(eu)) in gen12_sseu_info_init() 260 eu_en |= BIT(eu * 2) | BIT(eu * 2 + 1); in gen12_sseu_info_init() 337 subslice_mask_with_eus &= ~BIT(ss); in gen10_sseu_info_init() 376 sseu->slice_mask = BIT(0); in cherryview_sseu_info_init() 386 subslice_mask |= BIT(0); in cherryview_sseu_info_init() 397 subslice_mask |= BIT(1); in cherryview_sseu_info_init() 451 if (!(sseu->slice_mask & BIT(s))) in gen9_sseu_info_init() 479 sseu->subslice_7eu[s] |= BIT(ss); in gen9_sseu_info_init() [all …]
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| H A D | i915_vma_types.h | 240 #define I915_VMA_GLOBAL_BIND ((int)BIT(I915_VMA_GLOBAL_BIND_BIT)) 241 #define I915_VMA_LOCAL_BIND ((int)BIT(I915_VMA_LOCAL_BIND_BIT)) 246 #define I915_VMA_ALLOC ((int)BIT(I915_VMA_ALLOC_BIT)) 249 #define I915_VMA_ERROR ((int)BIT(I915_VMA_ERROR_BIT)) 256 #define I915_VMA_GGTT ((int)BIT(I915_VMA_GGTT_BIT)) 257 #define I915_VMA_CAN_FENCE ((int)BIT(I915_VMA_CAN_FENCE_BIT)) 258 #define I915_VMA_USERFAULT ((int)BIT(I915_VMA_USERFAULT_BIT)) 259 #define I915_VMA_GGTT_WRITE ((int)BIT(I915_VMA_GGTT_WRITE_BIT)) 264 #define I915_VMA_PAGES_ACTIVE (BIT(24) | 1)
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| /netbsd-src/external/gpl3/gdb/dist/sim/ppc/ |
| H A D | registers.h | 208 msr_64bit_mode = BIT(0), 213 msr_power_management_enable = BIT(45), 214 msr_tempoary_gpr_remapping = BIT(46), /* 603 specific */ 215 msr_interrupt_little_endian_mode = BIT(47), 216 msr_external_interrupt_enable = BIT(48), 217 msr_problem_state = BIT(49), 218 msr_floating_point_available = BIT(50), 219 msr_machine_check_enable = BIT(51), 220 msr_floating_point_exception_mode_0 = BIT(52), 221 msr_single_step_trace_enable = BIT(53), [all …]
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| /netbsd-src/external/gpl3/gdb/dist/sim/arm/ |
| H A D | armsupp.c | 150 if (BIT (16)) in ARMul_FixCPSR() 152 if (BIT (17)) in ARMul_FixCPSR() 154 if (BIT (18)) in ARMul_FixCPSR() 157 if (BIT (19)) in ARMul_FixCPSR() 193 if (BIT (16)) in ARMul_FixSPSR() 195 if (BIT (17)) in ARMul_FixSPSR() 197 if (BIT (18)) in ARMul_FixSPSR() 199 if (BIT (19)) in ARMul_FixSPSR() 394 if (BIT (bit)) in ARMul_NthReg() 500 if (BIT (20)) in handle_VFP_xfer() [all …]
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/i915/gt/uc/ |
| H A D | intel_guc_reg.h | 131 #define GUC_INTR_GUC2HOST BIT(15) 132 #define GUC_INTR_EXEC_ERROR BIT(14) 133 #define GUC_INTR_DISPLAY_EVENT BIT(13) 134 #define GUC_INTR_SEM_SIG BIT(12) 135 #define GUC_INTR_IOMMU2GUC BIT(11) 136 #define GUC_INTR_DOORBELL_RANG BIT(10) 137 #define GUC_INTR_DMA_DONE BIT(9) 138 #define GUC_INTR_FATAL_ERROR BIT(8) 139 #define GUC_INTR_NOTIF_ERROR BIT(7) 140 #define GUC_INTR_SW_INT_6 BIT(6) [all …]
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| /netbsd-src/external/gpl3/gdb.old/dist/gdb/testsuite/gdb.arch/ |
| H A D | mips-octeon-bbit.c | 6 #define DEF_BBIT_TAKEN(BRANCH_IF, BIT) \ argument 7 int bbit_is_taken_##BRANCH_IF##_##BIT (volatile uint64_t *p) \ 12 "bbit" #BRANCH_IF " %1, " #BIT ", 1f \n\t" \ 24 volatile uint64_t taken_##BRANCH_IF##_##BIT = \ 25 BASE & (~(1ull << BIT)) | ((uint64_t) BRANCH_IF << BIT); \ 26 volatile uint64_t not_taken_##BRANCH_IF##_##BIT = \ 27 BASE & (~(1ull << BIT)) | (((uint64_t) !BRANCH_IF) << BIT);
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| /netbsd-src/external/gpl3/gdb/dist/gdb/testsuite/gdb.arch/ |
| H A D | mips-octeon-bbit.c | 6 #define DEF_BBIT_TAKEN(BRANCH_IF, BIT) \ argument 7 int bbit_is_taken_##BRANCH_IF##_##BIT (volatile uint64_t *p) \ 12 "bbit" #BRANCH_IF " %1, " #BIT ", 1f \n\t" \ 24 volatile uint64_t taken_##BRANCH_IF##_##BIT = \ 25 BASE & (~(1ull << BIT)) | ((uint64_t) BRANCH_IF << BIT); \ 26 volatile uint64_t not_taken_##BRANCH_IF##_##BIT = \ 27 BASE & (~(1ull << BIT)) | (((uint64_t) !BRANCH_IF) << BIT);
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| /netbsd-src/sys/external/bsd/ena-com/ena_defs/ |
| H A D | ena_eth_io_defs.h | 311 #define ENA_ETH_IO_TX_DESC_META_DESC_MASK BIT(23) 313 #define ENA_ETH_IO_TX_DESC_PHASE_MASK BIT(24) 315 #define ENA_ETH_IO_TX_DESC_FIRST_MASK BIT(26) 317 #define ENA_ETH_IO_TX_DESC_LAST_MASK BIT(27) 319 #define ENA_ETH_IO_TX_DESC_COMP_REQ_MASK BIT(28) 322 #define ENA_ETH_IO_TX_DESC_DF_MASK BIT(4) 324 #define ENA_ETH_IO_TX_DESC_TSO_EN_MASK BIT(7) 328 #define ENA_ETH_IO_TX_DESC_L3_CSUM_EN_MASK BIT(13) 330 #define ENA_ETH_IO_TX_DESC_L4_CSUM_EN_MASK BIT(14) 332 #define ENA_ETH_IO_TX_DESC_ETHERNET_FCS_DIS_MASK BIT(15) [all …]
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| H A D | ena_admin_defs.h | 714 ENA_ADMIN_RSS_L2_DA = BIT(0), 717 ENA_ADMIN_RSS_L2_SA = BIT(1), 720 ENA_ADMIN_RSS_L3_DA = BIT(2), 723 ENA_ADMIN_RSS_L3_SA = BIT(3), 726 ENA_ADMIN_RSS_L4_DP = BIT(4), 729 ENA_ADMIN_RSS_L4_SP = BIT(5), 1006 #define ENA_ADMIN_AQ_COMMON_DESC_PHASE_MASK BIT(0) 1008 #define ENA_ADMIN_AQ_COMMON_DESC_CTRL_DATA_MASK BIT(1) 1010 #define ENA_ADMIN_AQ_COMMON_DESC_CTRL_DATA_INDIRECT_MASK BIT(2) 1018 #define ENA_ADMIN_ACQ_COMMON_DESC_PHASE_MASK BIT(0) [all …]
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| /netbsd-src/sys/external/bsd/ena-com/ |
| H A D | ena_eth_io_defs.h | 312 #define ENA_ETH_IO_TX_DESC_META_DESC_MASK BIT(23) 314 #define ENA_ETH_IO_TX_DESC_PHASE_MASK BIT(24) 316 #define ENA_ETH_IO_TX_DESC_FIRST_MASK BIT(26) 318 #define ENA_ETH_IO_TX_DESC_LAST_MASK BIT(27) 320 #define ENA_ETH_IO_TX_DESC_COMP_REQ_MASK BIT(28) 323 #define ENA_ETH_IO_TX_DESC_DF_MASK BIT(4) 325 #define ENA_ETH_IO_TX_DESC_TSO_EN_MASK BIT(7) 329 #define ENA_ETH_IO_TX_DESC_L3_CSUM_EN_MASK BIT(13) 331 #define ENA_ETH_IO_TX_DESC_L4_CSUM_EN_MASK BIT(14) 333 #define ENA_ETH_IO_TX_DESC_ETHERNET_FCS_DIS_MASK BIT(15) [all …]
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| H A D | ena_admin_defs.h | 644 ENA_ADMIN_RSS_L2_DA = BIT(0), 647 ENA_ADMIN_RSS_L2_SA = BIT(1), 650 ENA_ADMIN_RSS_L3_DA = BIT(2), 653 ENA_ADMIN_RSS_L3_SA = BIT(3), 656 ENA_ADMIN_RSS_L4_DP = BIT(4), 659 ENA_ADMIN_RSS_L4_SP = BIT(5), 934 #define ENA_ADMIN_AQ_COMMON_DESC_PHASE_MASK BIT(0) 936 #define ENA_ADMIN_AQ_COMMON_DESC_CTRL_DATA_MASK BIT(1) 938 #define ENA_ADMIN_AQ_COMMON_DESC_CTRL_DATA_INDIRECT_MASK BIT(2) 946 #define ENA_ADMIN_ACQ_COMMON_DESC_PHASE_MASK BIT(0) [all …]
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/i915/gem/ |
| H A D | i915_gem_object_types.h | 35 #define I915_GEM_OBJECT_HAS_STRUCT_PAGE BIT(0) 36 #define I915_GEM_OBJECT_HAS_IOMEM BIT(1) 37 #define I915_GEM_OBJECT_IS_SHRINKABLE BIT(2) 38 #define I915_GEM_OBJECT_IS_PROXY BIT(3) 39 #define I915_GEM_OBJECT_NO_GGTT BIT(4) 40 #define I915_GEM_OBJECT_ASYNC_CANCEL BIT(5) 155 #define I915_BO_ALLOC_CONTIGUOUS BIT(0) 156 #define I915_BO_ALLOC_VOLATILE BIT(1) 158 #define I915_BO_READONLY BIT(2) 166 #define I915_BO_CACHE_COHERENT_FOR_READ BIT(0) [all …]
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| /netbsd-src/sys/external/bsd/drm2/dist/include/drm/ |
| H A D | drm_hdcp.h | 28 #define DRM_HDCP_MAX_CASCADE_EXCEEDED(x) (x & BIT(3)) 29 #define DRM_HDCP_MAX_DEVICE_EXCEEDED(x) (x & BIT(7)) 41 #define DRM_HDCP_DDC_BCAPS_REPEATER_PRESENT BIT(6) 42 #define DRM_HDCP_DDC_BCAPS_KSV_FIFO_READY BIT(5) 110 #define HDCP_2_2_RX_REPEATER(x) ((x) & BIT(0)) 111 #define HDCP_2_2_DP_HDCP_CAPABLE(x) ((x) & BIT(1)) 115 #define HDCP_2_2_HDCP1_DEVICE_CONNECTED(x) ((x) & BIT(0)) 118 #define HDCP_2_2_HDCP_2_0_REP_CONNECTED(x) ((x) & BIT(1)) 119 #define HDCP_2_2_MAX_CASCADE_EXCEEDED(x) ((x) & BIT(2)) 120 #define HDCP_2_2_MAX_DEVS_EXCEEDED(x) ((x) & BIT(3)) [all …]
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| H A D | drm_drv.h | 60 DRIVER_GEM = BIT(0), 66 DRIVER_MODESET = BIT(1), 73 DRIVER_RENDER = BIT(3), 83 DRIVER_ATOMIC = BIT(4), 90 DRIVER_SYNCOBJ = BIT(5), 97 DRIVER_SYNCOBJ_TIMELINE = BIT(6), 107 DRIVER_USE_AGP = BIT(25), 113 DRIVER_LEGACY = BIT(26), 120 DRIVER_PCI_DMA = BIT(27), 128 DRIVER_SG = BIT(28), [all …]
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| /netbsd-src/lib/libc/arch/alpha/gen/ |
| H A D | divrem.m4 | 51 define(BIT, `t0') macro 61 stq BIT, 0(sp) 128 ldiq T_0, 1 /* I = 0; BIT = 1<<WORDSIZE-1 */ 130 sll T_0, WORDSIZE-1, BIT 132 and B, BIT, CC /* if bit in B is set, done. */ 135 srl BIT, 1, BIT 141 ldiq T_0, 1 /* BIT = 1<<WORDSIZE-1 */ 142 sll T_0, WORDSIZE-1, BIT 145 and A, BIT, CC /* if bit in A is set, done. */ 148 srl BIT, 1, BIT [all …]
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| /netbsd-src/sys/lib/libkern/arch/alpha/ |
| H A D | divrem.m4 | 51 define(BIT, `t0') macro 61 stq BIT, 0(sp) 128 ldiq T_0, 1 /* I = 0; BIT = 1<<WORDSIZE-1 */ 130 sll T_0, WORDSIZE-1, BIT 132 and B, BIT, CC /* if bit in B is set, done. */ 135 srl BIT, 1, BIT 141 ldiq T_0, 1 /* BIT = 1<<WORDSIZE-1 */ 142 sll T_0, WORDSIZE-1, BIT 145 and A, BIT, CC /* if bit in A is set, done. */ 148 srl BIT, 1, BIT [all …]
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/i915/gt/ |
| H A D | intel_engine_types.h | 436 #define EMIT_INVALIDATE BIT(0) 437 #define EMIT_FLUSH BIT(1) 442 #define I915_DISPATCH_SECURE BIT(0) 443 #define I915_DISPATCH_PINNED BIT(1) 487 #define I915_ENGINE_USING_CMD_PARSER BIT(0) 488 #define I915_ENGINE_SUPPORTS_STATS BIT(1) 489 #define I915_ENGINE_HAS_PREEMPTION BIT(2) 490 #define I915_ENGINE_HAS_SEMAPHORES BIT(3) 491 #define I915_ENGINE_NEEDS_BREADCRUMB_TASKLET BIT(4) 492 #define I915_ENGINE_IS_VIRTUAL BIT(5) [all …]
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| /netbsd-src/external/bsd/file/dist/src/ |
| H A D | file.h | 380 #define BIT(A) (1 << (A)) macro 381 #define STRING_COMPACT_WHITESPACE BIT(0) 382 #define STRING_COMPACT_OPTIONAL_WHITESPACE BIT(1) 383 #define STRING_IGNORE_LOWERCASE BIT(2) 384 #define STRING_IGNORE_UPPERCASE BIT(3) 385 #define REGEX_OFFSET_START BIT(4) 386 #define STRING_TEXTTEST BIT(5) 387 #define STRING_BINTEST BIT(6) 388 #define PSTRING_1_BE BIT(7) 389 #define PSTRING_1_LE BIT(7) [all …]
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