| /netbsd-src/external/gpl3/gcc.old/dist/gcc/config/bfin/ |
| H A D | constraints.md | 31 "An even-numbered Rn register.")
34 "An odd-numbered Rn register.")
37 "An accumulator register.")
40 "An even-numbered accumulator; A0.")
43 "An odd-numbered accumulator; A1.")
46 "An I register.")
52 "An M register.")
125 "An unsigned 3 bit immediate."
135 "An unsigned 4 bit immediate."
145 "An unsigned 5 bit immediate."
[all …]
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| /netbsd-src/external/gpl3/gcc/dist/gcc/config/bfin/ |
| H A D | constraints.md | 31 "An even-numbered Rn register.")
34 "An odd-numbered Rn register.")
37 "An accumulator register.")
40 "An even-numbered accumulator; A0.")
43 "An odd-numbered accumulator; A1.")
46 "An I register.")
52 "An M register.")
125 "An unsigned 3 bit immediate."
135 "An unsigned 4 bit immediate."
145 "An unsigned 5 bit immediate."
[all …]
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| /netbsd-src/external/gpl3/gcc.old/dist/gcc/config/spu/ |
| H A D | constraints.md | 33 …"An immediate which can be loaded with the il/ila/ilh/ilhu instructions. const_int is treated as …
39 …"An immediate for arithmetic instructions (e.g., ai, ceqi). const_int is treated as a 32-bit valu…
44 "An immediate for and/xor/or instructions. const_int is treated as a 32-bit value."
49 "An immediate for iohl instruction. const_int is treated as a 32-bit value."
54 …"An immediate which can be loaded with the il/ila/ilh/ilhu instructions. const_int is sign extend…
59 "An immediate for shift and rotate instructions. const_int is treated as a 32-bit value."
64 "An immediate for and/xor/or instructions. const_int is sign extended as a 128 bit."
69 "An immediate for iohl instruction. const_int is sign extended to 128 bit."
74 …"An immediate which can be loaded with the il/ila/ilh/ilhu instructions. const_int is treated as …
79 "An immediate for and/xor/or instructions. const_int is treated as a 64-bit value."
[all …]
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| /netbsd-src/games/phantasia/ |
| H A D | monsters.asc | 3 An Urisk 13 30 15 46 127 1 0 3
14 An Aspidchelone 114 104 19 898 10041 7 0 2
15 An Idiot 13 14 16 28 49 0 0 0
20 An Imp 22 30 14 40 92 0 0 1
30 An Uldra 14 37 21 32 93 1 0 6
35 An Orc 25 13 16 26 141 1 0 92
48 An Ogre 42 14 16 115 409 3 0 19
53 An Owlbear 35 16 18 100 623 4 0 22
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| /netbsd-src/external/gpl3/gcc/dist/gcc/config/mn10300/ |
| H A D | constraints.md | 24 "An address register.")
36 "An SP register (if available).")
42 "An extended register.")
67 "An integer zero."
72 "An integer one."
77 "An integer two."
82 "An integer four."
87 "An integer three."
92 "An integer of either 255 or 65535."
98 "An integer between -8 and +7 inclusive."
|
| /netbsd-src/external/gpl3/gcc.old/dist/gcc/config/mn10300/ |
| H A D | constraints.md | 24 "An address register.")
36 "An SP register (if available).")
42 "An extended register.")
67 "An integer zero."
72 "An integer one."
77 "An integer two."
82 "An integer four."
87 "An integer three."
92 "An integer of either 255 or 65535."
98 "An integer between -8 and +7 inclusive."
|
| /netbsd-src/external/apache2/llvm/dist/llvm/utils/unittest/googlemock/include/gmock/ |
| H A D | gmock-nice-strict.h | 92 template <typename A1, typename A2, typename... An>
93 NiceMock(A1&& arg1, A2&& arg2, An&&... args) in NiceMock()
95 std::forward<An>(args)...) { in NiceMock()
130 template <typename A1, typename A2, typename... An>
131 NaggyMock(A1&& arg1, A2&& arg2, An&&... args) in NaggyMock()
133 std::forward<An>(args)...) { in NaggyMock()
168 template <typename A1, typename A2, typename... An>
169 StrictMock(A1&& arg1, A2&& arg2, An&&... args) in StrictMock()
171 std::forward<An>(args)...) { in StrictMock()
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| /netbsd-src/external/gpl3/gcc/dist/gcc/config/stormy16/ |
| H A D | constraints.md | 44 "An integer between 0 and 3."
59 "An 8-bit unsigned integer."
64 "An integer between -255 and 0."
69 "An integer between -3 and 0."
74 "An integer between 1 and 4."
79 "An integer between -4 and -1."
97 "An immediate memory address."
108 "An integer not between 2 and 15."
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| /netbsd-src/external/gpl3/gcc.old/dist/gcc/config/stormy16/ |
| H A D | constraints.md | 44 "An integer between 0 and 3."
59 "An 8-bit unsigned integer."
64 "An integer between -255 and 0."
69 "An integer between -3 and 0."
74 "An integer between 1 and 4."
79 "An integer between -4 and -1."
97 "An immediate memory address."
108 "An integer not between 2 and 15."
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| /netbsd-src/external/gpl3/gcc/dist/gcc/config/fr30/ |
| H A D | constraints.md | 38 "An integer in the range 0 to 15."
43 "An integer in the range -16 to -1."
48 "An integer in the range 16 to 31."
53 "An integer in the range 0 to 255."
58 "An integer in the range 0 to 1048575."
63 "An integer in the range -256 to 255."
|
| /netbsd-src/external/gpl3/gcc.old/dist/gcc/config/fr30/ |
| H A D | constraints.md | 38 "An integer in the range 0 to 15."
43 "An integer in the range -16 to -1."
48 "An integer in the range 16 to 31."
53 "An integer in the range 0 to 255."
58 "An integer in the range 0 to 1048575."
63 "An integer in the range -256 to 255."
|
| /netbsd-src/external/apache2/llvm/dist/llvm/docs/ |
| H A D | AMDGPUInstructionNotation.rst | 43 An instruction may have zero or more *operands*. They are comma-separated in the description:
55 An operand is described using the following notation:
69 :opt An optional operand.
70 :m An operand which may be used with
73 :dst An input operand which may also serve as a destination
95 An instruction may have zero or more optional *modifiers*. They are space-separated in the descript…
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/M68k/ |
| H A D | M68kInstrFormats.td | 14 /// 00 M68000 Dn or An r any register
16 /// 02 M68000 An a address register direct
17 /// 03 M68000 (An) j address register indirect
18 /// 04 M68000 (An)+ o address register indirect with postincrement
19 /// 05 M68000 -(An) e address register indirect with predecrement
20 /// 06 M68000 (i,An) p address register indirect with displacement
21 /// 10 M68000 (i,An,Xn.L) f address register indirect with index and scale…
22 /// 07 M68000 (i,An,Xn.W) F address register indirect with index and scale…
23 /// 12 M68020 (i,An,Xn.L,SCALE) g address register indirect with index
24 /// 11 M68020 (i,An,Xn.W,SCALE) G address register indirect with index
[all …]
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| /netbsd-src/external/gpl3/gcc.old/dist/gcc/config/nios2/ |
| H A D | constraints.md | 63 "An unsigned 16-bit constant (for logical instructions)."
68 "An unsigned 16-bit high constant (for logical instructions)."
73 "An unsigned 5-bit constant (for shift counts)."
83 "An unsigned 8-bit constant (for custom instruction codes)."
88 "An unsigned 5-bit constant (for control register numbers)."
93 "An immediate operand for R2 andchi/andci instructions."
98 "An immediate stored in small data, accessible by GP, or by offset from r0."
|
| /netbsd-src/external/gpl3/gcc/dist/gcc/config/nios2/ |
| H A D | constraints.md | 63 "An unsigned 16-bit constant (for logical instructions)."
68 "An unsigned 16-bit high constant (for logical instructions)."
73 "An unsigned 5-bit constant (for shift counts)."
83 "An unsigned 8-bit constant (for custom instruction codes)."
88 "An unsigned 5-bit constant (for control register numbers)."
93 "An immediate operand for R2 andchi/andci instructions."
98 "An immediate stored in small data, accessible by GP, or by offset from r0."
|
| /netbsd-src/usr.bin/make/unit-tests/ |
| H A D | varparse-errors.mk | 16 INDIRECT= An ${:Uindirect} value.
20 ERR_UNCLOSED= An ${UNCLOSED expression.
22 ERR_BAD_MOD= An ${:Uindirect:Z} expression with an unknown modifier.
24 ERR_EVAL= An evaluation error ${:Uvalue:C,.,\3,}.
|
| /netbsd-src/external/apache2/llvm/dist/llvm/docs/AMDGPU/ |
| H A D | gfx10_waitcnt.rst | 27 * An :ref:`integer_number<amdgpu_synid_integer_number>` or an :ref:`absolute_expression<amdgpu_syni…
34 expcnt(<*N*>) An EXP_CNT value. *N* must not exceed the largest EXP_CNT value.
35 lgkmcnt(<*N*>) An LGKM_CNT value. *N* must not exceed the largest LGKM_CNT value.
37 expcnt_sat(<*N*>) An EXP_CNT value computed as min(*N*, the largest EXP_CNT value).
38 lgkmcnt_sat(<*N*>) An LGKM_CNT value computed as min(*N*, the largest LGKM_CNT value).
|
| H A D | gfx9_waitcnt.rst | 27 * An :ref:`integer_number<amdgpu_synid_integer_number>` or an :ref:`absolute_expression<amdgpu_syni…
34 expcnt(<*N*>) An EXP_CNT value. *N* must not exceed the largest EXP_CNT value.
35 lgkmcnt(<*N*>) An LGKM_CNT value. *N* must not exceed the largest LGKM_CNT value.
37 expcnt_sat(<*N*>) An EXP_CNT value computed as min(*N*, the largest EXP_CNT value).
38 lgkmcnt_sat(<*N*>) An LGKM_CNT value computed as min(*N*, the largest LGKM_CNT value).
|
| H A D | gfx8_waitcnt.rst | 27 * An :ref:`integer_number<amdgpu_synid_integer_number>` or an :ref:`absolute_expression<amdgpu_syni…
34 expcnt(<*N*>) An EXP_CNT value. *N* must not exceed the largest EXP_CNT value.
35 lgkmcnt(<*N*>) An LGKM_CNT value. *N* must not exceed the largest LGKM_CNT value.
37 expcnt_sat(<*N*>) An EXP_CNT value computed as min(*N*, the largest EXP_CNT value).
38 lgkmcnt_sat(<*N*>) An LGKM_CNT value computed as min(*N*, the largest LGKM_CNT value).
|
| H A D | gfx7_waitcnt.rst | 27 * An :ref:`integer_number<amdgpu_synid_integer_number>` or an :ref:`absolute_expression<amdgpu_syni…
34 expcnt(<*N*>) An EXP_CNT value. *N* must not exceed the largest EXP_CNT value.
35 lgkmcnt(<*N*>) An LGKM_CNT value. *N* must not exceed the largest LGKM_CNT value.
37 expcnt_sat(<*N*>) An EXP_CNT value computed as min(*N*, the largest EXP_CNT value).
38 lgkmcnt_sat(<*N*>) An LGKM_CNT value computed as min(*N*, the largest LGKM_CNT value).
|
| H A D | gfx90a_waitcnt.rst | 27 * An :ref:`integer_number<amdgpu_synid_integer_number>` or an :ref:`absolute_expression<amdgpu_syni…
34 expcnt(<*N*>) An EXP_CNT value. *N* must not exceed the largest EXP_CNT value.
35 lgkmcnt(<*N*>) An LGKM_CNT value. *N* must not exceed the largest LGKM_CNT value.
37 expcnt_sat(<*N*>) An EXP_CNT value computed as min(*N*, the largest EXP_CNT value).
38 lgkmcnt_sat(<*N*>) An LGKM_CNT value computed as min(*N*, the largest LGKM_CNT value).
|
| /netbsd-src/external/gpl3/gcc.old/dist/libstdc++-v3/include/ext/ |
| H A D | functional | 76 /// An \link SGIextensions SGI extension \endlink.
82 /// An \link SGIextensions SGI extension \endlink.
115 /// An \link SGIextensions SGI extension \endlink.
134 /// An \link SGIextensions SGI extension \endlink.
140 /// An \link SGIextensions SGI extension \endlink.
161 /// An \link SGIextensions SGI extension \endlink.
190 /// An \link SGIextensions SGI extension \endlink.
195 /// An \link SGIextensions SGI extension \endlink.
227 /// An \link SGIextensions SGI extension \endlink.
231 /// An \link SGIextensions SGI extension \endlink.
[all …]
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| /netbsd-src/external/gpl3/gcc/dist/libstdc++-v3/include/ext/ |
| H A D | functional | 79 /// An \link SGIextensions SGI extension \endlink.
85 /// An \link SGIextensions SGI extension \endlink.
118 /// An \link SGIextensions SGI extension \endlink.
137 /// An \link SGIextensions SGI extension \endlink.
143 /// An \link SGIextensions SGI extension \endlink.
164 /// An \link SGIextensions SGI extension \endlink.
193 /// An \link SGIextensions SGI extension \endlink.
198 /// An \link SGIextensions SGI extension \endlink.
230 /// An \link SGIextensions SGI extension \endlink.
234 /// An \link SGIextensions SGI extension \endlink.
[all …]
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| /netbsd-src/external/gpl3/gdb/dist/sim/testsuite/cris/asm/ |
| H A D | tmvm2.ms | 48 ; An insn-type that has a single register operand. The register
55 ; An insn-type that jumps to the destination of the register.
78 ; An insn-type that has a size-modifier and two register
88 ; An insn-type that has two register operands.
93 ; An t_r_rx insn with a byte or word-size modifier.
105 ; An insn-type that has a size-modifier, a constant and a
113 ; An insn-type that has a constant and a register operand.
118 ; An t_c_r insn with a byte or word-size modifier.
130 ; An insn-type that has size-modifier, a memory operand and a
151 ; An insn-type that has a memory operand and a register operand.
[all …]
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| /netbsd-src/external/gpl3/gcc.old/dist/gcc/config/aarch64/ |
| H A D | constraints.md | 282 An address valid for SVE PRFB instructions."
287 An address valid for SVE PRFD instructions."
292 An address valid for SVE PRFH instructions."
297 An address valid for SVE PRFW instructions."
302 An address valid for SVE LDFF1 instructions."
308 An address valid for SVE LDNF1 instructions."
314 An address valid for SVE LDR and STR instructions (as distinct from
321 An address valid for loading/storing opaque structure
328 An address valid for loading or storing a 128-bit AdvSIMD register"
337 An address valid for SVE LD1RQs."
[all …]
|