| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/XCore/ |
| H A D | XCoreISelLowering.cpp | 585 SDValue AddOp; in isADDADDMUL() local
588 AddOp = N0; in isADDADDMUL()
591 AddOp = N1; in isADDADDMUL()
596 if (requireIntermediatesHaveOneUse && !AddOp.hasOneUse()) in isADDADDMUL()
604 Addend0 = AddOp.getOperand(0); in isADDADDMUL()
605 Addend1 = AddOp.getOperand(1); in isADDADDMUL()
608 if (AddOp.getOperand(0).getOpcode() == ISD::MUL) { in isADDADDMUL()
610 if (requireIntermediatesHaveOneUse && !AddOp.getOperand(0).hasOneUse()) in isADDADDMUL()
612 Mul0 = AddOp.getOperand(0).getOperand(0); in isADDADDMUL()
613 Mul1 = AddOp.getOperand(0).getOperand(1); in isADDADDMUL()
[all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/TableGen/ |
| H A D | SetTheory.cpp | 39 struct AddOp : public SetTheory::Operator { struct
258 addOperator("add", std::make_unique<AddOp>()); in SetTheory()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineSelect.cpp | 1730 Instruction *AddOp = nullptr, *SubOp = nullptr; in foldAddSubSelect() local
1735 AddOp = FI; in foldAddSubSelect()
1741 AddOp = TI; in foldAddSubSelect()
1745 if (AddOp) { in foldAddSubSelect()
1747 if (SubOp->getOperand(0) == AddOp->getOperand(0)) { in foldAddSubSelect()
1748 OtherAddOp = AddOp->getOperand(1); in foldAddSubSelect()
1749 } else if (SubOp->getOperand(0) == AddOp->getOperand(1)) { in foldAddSubSelect()
1750 OtherAddOp = AddOp->getOperand(0); in foldAddSubSelect()
1760 FastMathFlags Flags = AddOp->getFastMathFlags(); in foldAddSubSelect()
1770 if (AddOp != TI) in foldAddSubSelect()
[all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Transforms/Vectorize/ |
| H A D | LoopVectorize.cpp | 2279 Instruction::BinaryOps AddOp; in createVectorIntOrFpInductionPHI() local
2282 AddOp = Instruction::Add; in createVectorIntOrFpInductionPHI()
2285 AddOp = II.getInductionOpcode(); in createVectorIntOrFpInductionPHI()
2325 Builder.CreateBinOp(AddOp, LastInduction, SplatVF, "step.add")); in createVectorIntOrFpInductionPHI()
2564 Instruction::BinaryOps AddOp; in buildScalarSteps() local
2567 AddOp = Instruction::Add; in buildScalarSteps()
2570 AddOp = ID.getInductionOpcode(); in buildScalarSteps()
2602 auto *Add = Builder.CreateBinOp(AddOp, SplatIV, Mul); in buildScalarSteps()
2616 AddOp, StartIdx0, getSignedIntOrFpConstant(ScalarIVTy, Lane)); in buildScalarSteps()
2623 auto *Add = Builder.CreateBinOp(AddOp, ScalarIV, Mul); in buildScalarSteps()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelDAGToDAG.cpp | 1703 unsigned AddOp = AMDGPU::V_ADD_CO_U32_e32; in SelectFlatOffsetImpl() local
1705 AddOp = AMDGPU::V_ADD_U32_e64; in SelectFlatOffsetImpl()
1708 Addr = SDValue(CurDAG->getMachineNode(AddOp, DL, MVT::i32, Opnds), 0); in SelectFlatOffsetImpl()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Analysis/ |
| H A D | ScalarEvolution.cpp | 2536 for (unsigned AddOp = 0, e = Ops.size(); AddOp != e; ++AddOp) in getAddExpr() local
2537 if (MulOpSCEV == Ops[AddOp]) { in getAddExpr()
2553 if (AddOp < Idx) { in getAddExpr()
2554 Ops.erase(Ops.begin()+AddOp); in getAddExpr()
2558 Ops.erase(Ops.begin()+AddOp-1); in getAddExpr()
2913 for (const SCEV *AddOp : Add->operands()) { in getMulExpr() local
2914 const SCEV *Mul = getMulExpr(Ops[0], AddOp, SCEV::FlagAnyWrap, in getMulExpr()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
| H A D | HexagonInstrInfo.cpp | 1968 const MachineOperand &AddOp = MI.getOperand(2); in getIncrementValue() local
1969 if (AddOp.isImm()) { in getIncrementValue()
1970 Value = AddOp.getImm(); in getIncrementValue()
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| /netbsd-src/sys/external/bsd/acpica/dist/tests/misc/ |
| H A D | grammar.asl | 3439 // Test AddOp with DWORD data
3445 // Test AddOp with WORD data
3450 // Test AddOp with BYTE data
3471 // test AddOp with DWORD SystemMemory OpRegion
3483 // test AddOp with WORD SystemMemory OpRegion
3495 // test AddOp with BYTE SystemMemory OpRegion
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.cpp | 856 Register &MulOp2, Register &AddOp, in reassociateFMA()
861 GetOperandInfo(Instr.getOperand(AddOpIdx), AddOp, AddOpKillFlag); in reassociateFMA()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeIntegerTypes.cpp | 835 unsigned AddOp = Opcode == ISD::SADDSAT ? ISD::ADD : ISD::SUB; in PromoteIntRes_ADDSUBSHLSAT() local
841 DAG.getNode(AddOp, dl, PromotedType, Op1Promoted, Op2Promoted); in PromoteIntRes_ADDSUBSHLSAT()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 36793 auto AddOp = [&Ops](SDValue Input, int InsertionPoint) -> int { in combineX86ShufflesRecursively() local
36812 AddOp(OpInput, OpInputIdx.empty() ? SrcOpIndex : -1)); in combineX86ShufflesRecursively()
|