Searched refs:AddInst (Results 1 – 4 of 4) sorted by relevance
800 Instruction *AddInst = cast<Instruction>(Offsets); in tryCreateIncrementingWBGatScat() local801 AddInst->replaceAllUsesWith(NewInduction); in tryCreateIncrementingWBGatScat()802 AddInst->eraseFromParent(); in tryCreateIncrementingWBGatScat()
1677 auto *AddInst = cast<OverflowingBinaryOperator>(Op0->getOperand(0)); in simplifyAndOfICmpsWithAdd() local1678 if (AddInst->getOperand(1) != Op1->getOperand(1)) in simplifyAndOfICmpsWithAdd()1682 bool isNSW = IIQ.hasNoSignedWrap(AddInst); in simplifyAndOfICmpsWithAdd()1683 bool isNUW = IIQ.hasNoUnsignedWrap(AddInst); in simplifyAndOfICmpsWithAdd()1813 auto *AddInst = cast<BinaryOperator>(Op0->getOperand(0)); in simplifyOrOfICmpsWithAdd() local1814 if (AddInst->getOperand(1) != Op1->getOperand(1)) in simplifyOrOfICmpsWithAdd()1818 bool isNSW = IIQ.hasNoSignedWrap(AddInst); in simplifyOrOfICmpsWithAdd()1819 bool isNUW = IIQ.hasNoUnsignedWrap(AddInst); in simplifyOrOfICmpsWithAdd()
1578 const MCInstrDesc& AddInst = TII.get( isPPC64 ? PPC::ADD8 in emitEpilogue() local1724 BuildMI(MBB, MBBI, dl, AddInst) in emitEpilogue()1891 BuildMI(MBB, MBBI, dl, AddInst) in emitEpilogue()
1077 MachineInstr &AddInst = in selectUadde() local1085 if (!constrainSelectedInstRegOperands(AddInst, TII, TRI, RBI) || in selectUadde()