| /minix3/external/bsd/llvm/dist/llvm/include/llvm/CodeGen/ |
| H A D | VirtRegMap.h | 99 assert(TargetRegisterInfo::isVirtualRegister(virtReg)); in getPhys() 106 assert(TargetRegisterInfo::isVirtualRegister(virtReg) && in assignVirt2Phys() 117 assert(TargetRegisterInfo::isVirtualRegister(virtReg)); in clearVirt() 169 assert(TargetRegisterInfo::isVirtualRegister(virtReg)); in getStackSlot()
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| H A D | RegisterPressure.h | 216 if (TargetRegisterInfo::isVirtualRegister(Reg)) 222 if (TargetRegisterInfo::isVirtualRegister(Reg)) 228 if (TargetRegisterInfo::isVirtualRegister(Reg))
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| /minix3/external/bsd/llvm/dist/llvm/lib/Target/Hexagon/ |
| H A D | HexagonPeephole.cpp | 143 if (TargetRegisterInfo::isVirtualRegister(DstReg) && in runOnMachineFunction() 144 TargetRegisterInfo::isVirtualRegister(SrcReg)) { in runOnMachineFunction() 194 if (TargetRegisterInfo::isVirtualRegister(DstReg) && in runOnMachineFunction() 195 TargetRegisterInfo::isVirtualRegister(SrcReg)) { in runOnMachineFunction() 216 if (TargetRegisterInfo::isVirtualRegister(DstReg) && in runOnMachineFunction() 217 TargetRegisterInfo::isVirtualRegister(SrcReg)) { in runOnMachineFunction() 252 if (TargetRegisterInfo::isVirtualRegister(Reg0)) { in runOnMachineFunction()
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| /minix3/external/bsd/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | A15SDOptimizer.cpp | 141 if (TargetRegisterInfo::isVirtualRegister(Reg)) in usesRegClass() 157 if (!TRI->isVirtualRegister(SReg)) in getPrefSPRLane() 172 if (TargetRegisterInfo::isVirtualRegister(SReg)) { in getPrefSPRLane() 199 if (!TRI->isVirtualRegister(Reg)) in eraseInstrWithNoUses() 222 if (!TRI->isVirtualRegister(DefReg)) { in eraseInstrWithNoUses() 258 if (TRI->isVirtualRegister(DPRReg) && TRI->isVirtualRegister(SPRReg)) { in optimizeSDPattern() 308 if (!TRI->isVirtualRegister(OpReg)) in optimizeSDPattern() 352 if (!TRI->isVirtualRegister(MI->getOperand(1).getReg())) in elideCopies() 380 if (!TRI->isVirtualRegister(Reg)) { in elideCopiesAndPHIs() 389 if (!TRI->isVirtualRegister(MI->getOperand(1).getReg())) in elideCopiesAndPHIs() [all …]
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| H A D | MLxExpansionPass.cpp | 101 if (TargetRegisterInfo::isVirtualRegister(Reg)) { in getAccDefMI() 107 if (TargetRegisterInfo::isVirtualRegister(Reg)) { in getAccDefMI() 159 if (TargetRegisterInfo::isVirtualRegister(SrcReg)) { in hasLoopHazard() 167 if (TargetRegisterInfo::isVirtualRegister(Reg)) { in hasLoopHazard() 173 if (TargetRegisterInfo::isVirtualRegister(Reg)) { in hasLoopHazard()
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| /minix3/external/bsd/llvm/dist/llvm/lib/Target/R600/ |
| H A D | SIFoldOperands.cpp | 117 if (TargetRegisterInfo::isVirtualRegister(Old.getReg()) && in updateOperand() 118 TargetRegisterInfo::isVirtualRegister(New->getReg())) { in updateOperand() 192 (!TargetRegisterInfo::isVirtualRegister(OpToFold.getReg()) || in runOnMachineFunction() 214 = TargetRegisterInfo::isVirtualRegister(UseReg) ? in runOnMachineFunction() 238 = TargetRegisterInfo::isVirtualRegister(DestReg) ? in runOnMachineFunction()
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| H A D | SIFixSGPRCopies.cpp | 122 !TargetRegisterInfo::isVirtualRegister(MI.getOperand(i).getReg())) in hasVGPROperands() 141 = TargetRegisterInfo::isVirtualRegister(Reg) ? in inferRegClassFromUses() 165 if (!TargetRegisterInfo::isVirtualRegister(Reg)) { in inferRegClassFromDef() 187 = TargetRegisterInfo::isVirtualRegister(DstReg) ? in isVGPRToSGPRCopy() 193 if (!TargetRegisterInfo::isVirtualRegister(SrcReg) || in isVGPRToSGPRCopy()
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| H A D | SILowerI1Copies.cpp | 102 if (!TargetRegisterInfo::isVirtualRegister(Src.getReg()) || in runOnMachineFunction() 103 !TargetRegisterInfo::isVirtualRegister(Dst.getReg())) in runOnMachineFunction()
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| H A D | SIShrinkInstructions.cpp | 79 if (TargetRegisterInfo::isVirtualRegister(MO->getReg())) in isVGPR() 219 if (TargetRegisterInfo::isVirtualRegister(DstReg)) { in runOnMachineFunction()
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| H A D | R600RegisterInfo.cpp | 79 assert(!TargetRegisterInfo::isVirtualRegister(Reg)); in isPhysRegLiveAcrossClauses()
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| /minix3/external/bsd/llvm/dist/llvm/lib/CodeGen/ |
| H A D | MachineCSE.cpp | 129 if (!TargetRegisterInfo::isVirtualRegister(Reg)) in INITIALIZE_PASS_DEPENDENCY() 136 if (!TargetRegisterInfo::isVirtualRegister(SrcReg)) in INITIALIZE_PASS_DEPENDENCY() 229 if (TargetRegisterInfo::isVirtualRegister(Reg)) in hasLivePhysRegDefUses() 248 if (TargetRegisterInfo::isVirtualRegister(Reg)) in hasLivePhysRegDefUses() 322 if (TargetRegisterInfo::isVirtualRegister(MOReg)) in PhysRegDefsReach() 371 if (TargetRegisterInfo::isVirtualRegister(CSReg) && in isProfitableToCSE() 372 TargetRegisterInfo::isVirtualRegister(Reg)) { in isProfitableToCSE() 403 TargetRegisterInfo::isVirtualRegister(MO.getReg())) { in isProfitableToCSE() 557 assert(TargetRegisterInfo::isVirtualRegister(OldReg) && in ProcessBlock() 558 TargetRegisterInfo::isVirtualRegister(NewReg) && in ProcessBlock()
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| H A D | VirtRegMap.cpp | 88 if (TargetRegisterInfo::isVirtualRegister(Hint)) in hasPreferredPhys() 97 if (TargetRegisterInfo::isVirtualRegister(Hint.second)) in hasKnownPreference() 103 assert(TargetRegisterInfo::isVirtualRegister(virtReg)); in assignVirt2StackSlot() 111 assert(TargetRegisterInfo::isVirtualRegister(virtReg)); in assignVirt2StackSlot() 354 TargetRegisterInfo::isVirtualRegister(MO.getReg()) ? in rewrite() 358 if (!MO.isReg() || !TargetRegisterInfo::isVirtualRegister(MO.getReg())) in rewrite()
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| H A D | RegAllocFast.cpp | 257 assert(TargetRegisterInfo::isVirtualRegister(VirtReg) && in killVirtReg() 267 assert(TargetRegisterInfo::isVirtualRegister(VirtReg) && in spillVirtReg() 524 assert(TargetRegisterInfo::isVirtualRegister(VirtReg) && in allocVirtReg() 596 assert(TargetRegisterInfo::isVirtualRegister(VirtReg) && in defineVirtReg() 629 assert(TargetRegisterInfo::isVirtualRegister(VirtReg) && in reloadVirtReg() 715 if (!TargetRegisterInfo::isVirtualRegister(Reg)) in handleThroughOperands() 745 if (!TargetRegisterInfo::isVirtualRegister(Reg)) continue; in handleThroughOperands() 770 if (!TargetRegisterInfo::isVirtualRegister(Reg)) continue; in handleThroughOperands() 844 assert(TargetRegisterInfo::isVirtualRegister(i->VirtReg) && in AllocateBasicBlock() 861 if (!TargetRegisterInfo::isVirtualRegister(Reg)) continue; in AllocateBasicBlock() [all …]
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| H A D | OptimizePHIs.cpp | 113 TargetRegisterInfo::isVirtualRegister(SrcMI->getOperand(1).getReg())) in IsSingleValuePHICycle() 136 assert(TargetRegisterInfo::isVirtualRegister(DstReg) && in IsDeadPHICycle()
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| H A D | RegisterScavenging.cpp | 131 if (!Reg || TargetRegisterInfo::isVirtualRegister(Reg) || isReserved(Reg)) in determineKillsAndDefs() 203 if (!Reg || TargetRegisterInfo::isVirtualRegister(Reg) || isReserved(Reg)) in forward() 319 if (TargetRegisterInfo::isVirtualRegister(MO.getReg())) { in findSurvivorReg() 378 !TargetRegisterInfo::isVirtualRegister(MO.getReg())) in scavengeRegister()
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| H A D | TargetRegisterInfo.cpp | 42 else if (TargetRegisterInfo::isVirtualRegister(Reg)) in print() 78 if (TRI && TRI->isVirtualRegister(Unit)) { in print() 280 if (VRM && isVirtualRegister(Phys)) in getRegAllocationHints()
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| H A D | MachineCopyPropagation.cpp | 154 if (TargetRegisterInfo::isVirtualRegister(Def) || in CopyPropagateBlock() 155 TargetRegisterInfo::isVirtualRegister(Src)) in CopyPropagateBlock() 251 if (TargetRegisterInfo::isVirtualRegister(Reg)) in CopyPropagateBlock()
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| H A D | MachineVerifier.cpp | 133 if (!TargetRegisterInfo::isVirtualRegister(Reg)) in addPassed() 152 if (!TargetRegisterInfo::isVirtualRegister(Reg)) in addRequired() 1016 if (LiveVars && TargetRegisterInfo::isVirtualRegister(Reg) && in checkLiveness() 1044 if (TargetRegisterInfo::isVirtualRegister(Reg)) { in checkLiveness() 1106 if (MRI->isSSA() && TargetRegisterInfo::isVirtualRegister(Reg) && in checkLiveness() 1111 if (LiveInts && TargetRegisterInfo::isVirtualRegister(Reg) && in checkLiveness() 1434 if (TargetRegisterInfo::isVirtualRegister(Reg)) { in verifyLiveRangeValue() 1514 if (!TargetRegisterInfo::isVirtualRegister(Reg) && VNI->isPHIDef() && in verifyLiveRangeSegment() 1558 if (TargetRegisterInfo::isVirtualRegister(Reg)) { in verifyLiveRangeSegment() 1600 if (!TargetRegisterInfo::isVirtualRegister(Reg) && in verifyLiveRangeSegment() [all …]
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| H A D | TwoAddressInstructionPass.cpp | 362 if (LIS && TargetRegisterInfo::isVirtualRegister(Reg) && in isPlainlyKilled() 481 while (TargetRegisterInfo::isVirtualRegister(Reg)) { in getMappedReg() 1114 assert(TargetRegisterInfo::isVirtualRegister(regB) && in tryInstructionTransform() 1118 if (TargetRegisterInfo::isVirtualRegister(regA)) in tryInstructionTransform() 1245 TargetRegisterInfo::isVirtualRegister(MO.getReg())) { in tryInstructionTransform() 1331 if (TargetRegisterInfo::isVirtualRegister(DstReg)) in collectTiedOperands() 1384 assert(TargetRegisterInfo::isVirtualRegister(RegB) && in processTiedPairs() 1405 if (TargetRegisterInfo::isVirtualRegister(RegA)) { in processTiedPairs() 1427 if (TargetRegisterInfo::isVirtualRegister(RegA)) { in processTiedPairs() 1447 if (TargetRegisterInfo::isVirtualRegister(RegA) && in processTiedPairs() [all …]
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| H A D | MachineCombiner.cpp | 104 if (MO.isReg() && TargetRegisterInfo::isVirtualRegister(MO.getReg())) in getOperandDef() 137 if (!(MO.isReg() && TargetRegisterInfo::isVirtualRegister(MO.getReg()))) in getDepth() 193 if (!(MO.isReg() && TargetRegisterInfo::isVirtualRegister(MO.getReg()))) in getLatency()
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| H A D | LiveVariables.cpp | 85 assert(TargetRegisterInfo::isVirtualRegister(RegIdx) && in getVarInfo() 537 if (TargetRegisterInfo::isVirtualRegister(MOReg)) in runOnInstr() 550 if (TargetRegisterInfo::isVirtualRegister(MOReg)) in runOnInstr() 694 if (TargetRegisterInfo::isVirtualRegister(Reg)) { in removeVirtualRegistersKilled() 807 if (I->isReg() && TargetRegisterInfo::isVirtualRegister(I->getReg())) { in addNewBlock()
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| H A D | RegisterPressure.cpp | 151 if (TargetRegisterInfo::isVirtualRegister(Reg)) in getLiveRange() 294 if (TargetRegisterInfo::isVirtualRegister(Reg) in initLiveThru() 343 if (TargetRegisterInfo::isVirtualRegister(Reg)) { in pushRegUnits() 545 if (TargetRegisterInfo::isVirtualRegister(Reg) && !LiveRegs.contains(Reg)) in recede() 593 lastUse = !TargetRegisterInfo::isVirtualRegister(Reg); in advance() 931 else if (!TargetRegisterInfo::isVirtualRegister(Reg)) { in bumpDownwardPressure()
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| /minix3/external/bsd/llvm/dist/llvm/include/llvm/Target/ |
| H A D | TargetRegisterInfo.h | 291 static bool isVirtualRegister(unsigned Reg) { in isVirtualRegister() function 299 assert(isVirtualRegister(Reg) && "Not a virtual register"); in virtReg2Index() 400 if (isVirtualRegister(regA) || isVirtualRegister(regB)) in regsOverlap()
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| /minix3/external/bsd/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrInfo.cpp | 295 while (TargetRegisterInfo::isVirtualRegister(VReg)) { in removeCopies() 310 if (!TargetRegisterInfo::isVirtualRegister(VReg)) in canFoldIntoCSel() 1847 if (TargetRegisterInfo::isVirtualRegister(SrcReg)) in storeRegToStackSlot() 1857 if (TargetRegisterInfo::isVirtualRegister(SrcReg)) in storeRegToStackSlot() 1945 if (TargetRegisterInfo::isVirtualRegister(DestReg)) in loadRegFromStackSlot() 1955 if (TargetRegisterInfo::isVirtualRegister(DestReg)) in loadRegFromStackSlot() 2093 TargetRegisterInfo::isVirtualRegister(DstReg)) { in foldMemoryOperandImpl() 2098 TargetRegisterInfo::isVirtualRegister(SrcReg)) { in foldMemoryOperandImpl() 2445 if (MO.isReg() && TargetRegisterInfo::isVirtualRegister(MO.getReg())) in canCombineWithMUL() 2607 if (TargetRegisterInfo::isVirtualRegister(ResultReg)) in genMadd() [all …]
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| H A D | AArch64AdvSIMDScalarPass.cpp | 105 if (TargetRegisterInfo::isVirtualRegister(Reg)) in isGPR64() 112 if (TargetRegisterInfo::isVirtualRegister(Reg)) in isFPR64()
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