| /minix3/external/bsd/llvm/dist/llvm/lib/Target/Sparc/ |
| H A D | SparcInstrInfo.h | 63 unsigned isStoreToStackSlot(const MachineInstr *MI,
|
| H A D | SparcInstrInfo.cpp | 66 unsigned SparcInstrInfo::isStoreToStackSlot(const MachineInstr *MI, in isStoreToStackSlot() function in SparcInstrInfo
|
| /minix3/external/bsd/llvm/dist/llvm/lib/Target/XCore/ |
| H A D | XCoreInstrInfo.h | 50 unsigned isStoreToStackSlot(const MachineInstr *MI,
|
| H A D | XCoreInstrInfo.cpp | 85 XCoreInstrInfo::isStoreToStackSlot(const MachineInstr *MI, in isStoreToStackSlot() function in XCoreInstrInfo
|
| /minix3/external/bsd/llvm/dist/llvm/lib/Target/Mips/ |
| H A D | MipsSEInstrInfo.h | 43 unsigned isStoreToStackSlot(const MachineInstr *MI,
|
| H A D | Mips16InstrInfo.h | 43 unsigned isStoreToStackSlot(const MachineInstr *MI,
|
| H A D | Mips16InstrInfo.cpp | 56 unsigned Mips16InstrInfo::isStoreToStackSlot(const MachineInstr *MI, in isStoreToStackSlot() function in Mips16InstrInfo
|
| H A D | MipsSEInstrInfo.cpp | 63 unsigned MipsSEInstrInfo::isStoreToStackSlot(const MachineInstr *MI, in isStoreToStackSlot() function in MipsSEInstrInfo
|
| /minix3/external/bsd/llvm/dist/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.h | 123 unsigned isStoreToStackSlot(const MachineInstr *MI,
|
| H A D | README_ALTIVEC.txt | 3 Implement PPCInstrInfo::isLoadFromStackSlot/isStoreToStackSlot for vector
|
| H A D | PPCInstrInfo.cpp | 200 unsigned PPCInstrInfo::isStoreToStackSlot(const MachineInstr *MI, in isStoreToStackSlot() function in PPCInstrInfo
|
| /minix3/external/bsd/llvm/dist/llvm/lib/Target/SystemZ/ |
| H A D | SystemZInstrInfo.h | 139 unsigned isStoreToStackSlot(const MachineInstr *MI,
|
| H A D | SystemZInstrInfo.cpp | 211 unsigned SystemZInstrInfo::isStoreToStackSlot(const MachineInstr *MI, in isStoreToStackSlot() function in SystemZInstrInfo
|
| /minix3/external/bsd/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrInfo.h | 61 unsigned isStoreToStackSlot(const MachineInstr *MI,
|
| H A D | AArch64InstrInfo.cpp | 1208 unsigned AArch64InstrInfo::isStoreToStackSlot(const MachineInstr *MI, in isStoreToStackSlot() function in AArch64InstrInfo
|
| /minix3/external/bsd/llvm/dist/llvm/lib/Target/Hexagon/ |
| H A D | HexagonInstrInfo.h | 58 unsigned isStoreToStackSlot(const MachineInstr *MI,
|
| H A D | HexagonInstrInfo.cpp | 102 unsigned HexagonInstrInfo::isStoreToStackSlot(const MachineInstr *MI, in isStoreToStackSlot() function in HexagonInstrInfo
|
| /minix3/external/bsd/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86InstrInfo.h | 196 unsigned isStoreToStackSlot(const MachineInstr *MI,
|
| H A D | X86InstrInfo.cpp | 1800 unsigned X86InstrInfo::isStoreToStackSlot(const MachineInstr *MI, in isStoreToStackSlot() function in X86InstrInfo
1813 if ((Reg = isStoreToStackSlot(MI, FrameIndex))) in isStoreToStackSlotPostFE()
|
| /minix3/external/bsd/llvm/dist/llvm/lib/CodeGen/ |
| H A D | InlineSpiller.cpp | 257 if (SnipLI.reg == TII.isStoreToStackSlot(MI, FI) && FI == StackSlot) in isSnippet()
805 if (Reg == TII.isStoreToStackSlot(MI, FI) && FI == StackSlot) { in eliminateRedundantSpills()
1020 InstrReg = TII.isStoreToStackSlot(MI, FI); in coalesceStackAccess()
|
| H A D | StackSlotColoring.cpp | 395 if (!(StoreReg = TII->isStoreToStackSlot(NextMI, SecondSS))) continue; in RemoveDeadStores()
|
| /minix3/external/bsd/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.h | 152 unsigned isStoreToStackSlot(const MachineInstr *MI,
|
| H A D | ARMBaseInstrInfo.cpp | 1016 ARMBaseInstrInfo::isStoreToStackSlot(const MachineInstr *MI, in isStoreToStackSlot() function in ARMBaseInstrInfo
|
| /minix3/external/bsd/llvm/dist/llvm/include/llvm/Target/ |
| H A D | TargetInstrInfo.h | 164 virtual unsigned isStoreToStackSlot(const MachineInstr *MI, in isStoreToStackSlot() function
|
| /minix3/external/bsd/llvm/dist/llvm/docs/ |
| H A D | WritingAnLLVMBackend.rst | 1044 * ``isStoreToStackSlot`` --- If the specified machine instruction is a direct
|