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Searched refs:isCodeGenOnly (Results 1 – 25 of 52) sorted by relevance

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/minix3/external/bsd/llvm/dist/llvm/lib/Target/Hexagon/
H A DHexagonInstrInfo.td143 let isCodeGenOnly = 0 in {
157 isCodeGenOnly = 0 in {
177 let isCodeGenOnly = 0 in {
198 isCodeGenOnly = 0 in {
232 let Itinerary = ALU32_3op_tc_2early_SLOT0123, isCodeGenOnly = 0 in {
256 isCodeGenOnly = 0 in
286 AddedComplexity = 75, isCodeGenOnly = 0 in
379 let isCodeGenOnly = 0 in
409 let isCodeGenOnly = 0 in {
417 CextOpcode = "sub", InputType = "imm", hasNewValue = 1, isCodeGenOnly = 0 in
[all …]
H A DHexagonInstrInfoV3.td67 let isCodeGenOnly = 0 in
97 validSubTargets = HasV3SubT, isCodeGenOnly = 0 in
103 let isCodeGenOnly = 0 in {
108 let hasSideEffects = 0, isCodeGenOnly = 0 in
137 let isCodeGenOnly = 0 in {
H A DHexagonInstrInfoV4.td26 let isCodeGenOnly = 1 in {
122 let BaseOpcode = "andn_rr", CextOpcode = "andn", isCodeGenOnly = 0 in
124 let BaseOpcode = "orn_rr", CextOpcode = "orn", isCodeGenOnly = 0 in
127 let CextOpcode = "rcmp.eq", isCodeGenOnly = 0 in
129 let CextOpcode = "!rcmp.eq", isCodeGenOnly = 0 in
132 let isCodeGenOnly = 0 in {
172 let isCodeGenOnly = 0 in {
211 let isCodeGenOnly = 0 in {
246 let isCodeGenOnly = 0 in {
289 let opExtendable = 2, isCodeGenOnly = 0 in
[all …]
H A DHexagonInstrInfoV5.td18 let isCodeGenOnly = 0 in
28 let isCodeGenOnly = 0 in
34 let isCodeGenOnly = 0 in
72 isCodeGenOnly = 1 in
99 let hasNewValue = 1, validSubTargets = HasV5SubT, isCodeGenOnly = 0 in
137 let isCommutable = 1, isCodeGenOnly = 0 in {
142 let isCodeGenOnly = 0 in
145 let Itinerary = M_tc_3x_SLOT23, isCodeGenOnly = 0 in {
150 let isCodeGenOnly = 0 in {
157 hasSideEffects = 0, hasNewValue = 1, isCodeGenOnly = 0 in
[all …]
H A DHexagonInstrFormatsV4.td65 let isCodeGenOnly = 1 in
H A DHexagonInstrFormats.td195 let isCodeGenOnly = 1;
330 let isCodeGenOnly = 1, isPseudo = 1 in
335 let isCodeGenOnly = 1, isPseudo = 1 in
340 let isCodeGenOnly = 1, isPseudo = 1 in
/minix3/external/bsd/llvm/dist/llvm/lib/Target/PowerPC/
H A DPPCInstr64Bit.td82 let Interpretation64Bit = 1, isCodeGenOnly = 1 in {
139 let Uses = [RM], isCodeGenOnly = 1 in {
158 let isCodeGenOnly = 1 in {
174 let isCall = 1, PPC970_Unit = 7, isCodeGenOnly = 1,
251 let Interpretation64Bit = 1, isCodeGenOnly = 1 in {
298 let Interpretation64Bit = 1, isCodeGenOnly = 1 in {
384 let isCodeGenOnly = 1 in {
514 } // isCodeGenOnly
557 let Interpretation64Bit = 1, isCodeGenOnly = 1 in {
575 let isCodeGenOnly = 1 in {
[all …]
H A DPPCInstrInfo.td1024 let isCodeGenOnly = 1 in {
1056 let isCodeGenOnly = 1 in {
1068 let isCodeGenOnly = 1 in {
1128 let isCall = 1, hasCtrlDep = 1, isCodeGenOnly = 1, PPC970_Unit = 7 in {
1143 let isCodeGenOnly = 1 in {
1164 let isCodeGenOnly = 1 in {
1179 let isCodeGenOnly = 1 in {
1250 let isCodeGenOnly = 1 in {
1715 let isCodeGenOnly = 1 in {
1749 let isCodeGenOnly = 1 in
[all …]
/minix3/external/bsd/llvm/dist/llvm/lib/Target/Mips/
H A DMipsCondMov.td109 let isCodeGenOnly = 1 in {
121 let isCodeGenOnly = 1 in {
133 let isCodeGenOnly = 1 in
141 let isCodeGenOnly = 1 in
158 let isCodeGenOnly = 1 in {
169 let isCodeGenOnly = 1 in
177 let isCodeGenOnly = 1 in
H A DMips64InstrInfo.td59 let isPseudo = 1, isCodeGenOnly = 1 in {
75 let isCodeGenOnly = 1 in {
99 let isCodeGenOnly = 1 in {
139 let isCodeGenOnly = 1 in {
155 let isCodeGenOnly = 1 in {
176 let isCodeGenOnly = 1 in {
210 let isCodeGenOnly = 1 in {
242 let isCodeGenOnly = 1 in
253 let isCodeGenOnly = 1, rs = 0, shamt = 0 in {
H A DMips16InstrInfo.td110 let isCodeGenOnly=1;
121 let isCodeGenOnly=1;
130 let isCodeGenOnly=1;
170 let isCodeGenOnly=1;
268 let isCodeGenOnly=1;
280 let isCodeGenOnly=1;
317 let isCodeGenOnly=1;
428 //let isCodeGenOnly=1;
454 let isCodeGenOnly=1;
478 let isCodeGenOnly=1;
[all …]
H A DMicroMipsInstrFPU.td1 let isCodeGenOnly = 1, Predicates = [InMicroMips] in {
/minix3/external/bsd/llvm/dist/llvm/lib/Target/X86/
H A DX86InstrControl.td62 let hasSideEffects = 0, isCodeGenOnly = 1, ForceDisassemble = 1 in {
75 let hasSideEffects = 0, isCodeGenOnly = 1, ForceDisassemble = 1 in {
229 isCodeGenOnly = 1, SchedRW = [WriteJumpLd] in
281 let isCall = 1, isCodeGenOnly = 1 in
294 isCodeGenOnly = 1, Uses = [RSP], usesCustomInserter = 1,
H A DX86InstrFMA.td242 let isCodeGenOnly = 1, ForceDisassemble = 1, hasSideEffects = 0 in
252 let isCodeGenOnly = 1 in {
272 } // isCodeGenOnly = 1
319 let isCodeGenOnly = 1, ForceDisassemble = 1, hasSideEffects = 0 in {
329 } // isCodeGenOnly = 1
H A DX86InstrCompiler.td156 hasCtrlDep = 1, isCodeGenOnly = 1 in {
164 hasCtrlDep = 1, isCodeGenOnly = 1 in {
171 let hasSideEffects = 1, isBarrier = 1, isCodeGenOnly = 1,
194 let isBranch = 1, isTerminator = 1, isCodeGenOnly = 1 in {
262 isCodeGenOnly = 1, hasSideEffects = 0 in
288 } // isCodeGenOnly
340 let Defs = [ECX,EDI,ESI], Uses = [ECX,EDI,ESI], isCodeGenOnly = 1 in {
352 let Defs = [RCX,RDI,RSI], Uses = [RCX,RDI,RSI], isCodeGenOnly = 1 in {
368 let Defs = [ECX,EDI], isCodeGenOnly = 1 in {
383 let Defs = [RCX,RDI], isCodeGenOnly = 1 in {
[all …]
H A DX86InstrSSE.td268 let isCodeGenOnly = 1 in {
560 let isCodeGenOnly = 1, ForceDisassemble = 1, hasSideEffects = 0 in
904 let isCodeGenOnly = 1, ForceDisassemble = 1, hasSideEffects = 0,
981 let isCodeGenOnly = 1, ForceDisassemble = 1, hasSideEffects = 0,
1129 let isCodeGenOnly = 1 in {
1686 let isCodeGenOnly = 1 in {
1717 } // isCodeGenOnly = 1
1722 let isCodeGenOnly = 1 in {
1751 } // isCodeGenOnly = 1
1850 let isCodeGenOnly = 1 in {
[all …]
H A DX86InstrMMX.td264 let isCodeGenOnly = 1, ForceDisassemble = 1, hasSideEffects = 0 in {
301 let isCodeGenOnly = 1, hasSideEffects = 1 in {
/minix3/external/bsd/llvm/dist/llvm/utils/TableGen/
H A DCodeGenInstruction.h253 bool isCodeGenOnly : 1; variable
H A DPseudoLoweringEmitter.cpp142 if (Insn.isCodeGenOnly || Insn.isPseudo) in evaluateExpansion()
/minix3/external/bsd/llvm/dist/llvm/lib/Target/R600/
H A DAMDGPUInstructions.td26 let isCodeGenOnly = 1;
443 let isCodeGenOnly = 1, isPseudo = 1 in {
494 } // End isCodeGenOnly = 1, isPseudo = 1
H A DR600Instructions.td733 let isPseudo = 1, isCodeGenOnly = 1, usesCustomInserter = 1 in {
742 } // end let isPseudo = 1, isCodeGenOnly = 1, usesCustomInserter = 1
945 let isCodeGenOnly = 1, isPseudo = 1, Namespace = "AMDGPU" in {
1361 let usesCustomInserter = 1, isCodeGenOnly = 1, isPseudo = 1, Namespace = "AMDGPU" in {
1372 } // end usesCustomInserter = 1, isCodeGenOnly = 1, isPseudo = 1, Namespace = "AMDGPU"
1500 let isCodeGenOnly = 1;
/minix3/external/bsd/llvm/dist/llvm/lib/Target/Sparc/
H A DSparcInstrInfo.td305 let isCodeGenOnly = 1;
399 isCodeGenOnly = 1 in {
510 let Predicates = [Is32Bit], isCodeGenOnly = 1 in
619 isIndirectBranch = 1, rd = 0, isCodeGenOnly = 1 in {
694 let isCodeGenOnly = 1, rd = 15 in {
890 let Defs = [FCC0], rd = 0, isCodeGenOnly = 1 in {
909 let isCodeGenOnly = 1, isAsmParserOnly = 1 in {
H A DSparcInstr64Bit.td144 let isCodeGenOnly = 1 in {
241 let mayLoad = 1, isCodeGenOnly = 1, isAsmParserOnly = 1 in
480 let Predicates = [Is64Bit], isCodeGenOnly = 1 in {
/minix3/external/bsd/llvm/dist/llvm/lib/Target/SystemZ/
H A DSystemZInstrInfo.td59 let isCodeGenOnly = 1, CCMaskFirst = 1 in {
110 let isCodeGenOnly = 1 in
279 let isCodeGenOnly = 1, Uses = [CC] in {
338 let isCodeGenOnly = 1, Uses = [CC] in {
368 let isCodeGenOnly = 1, Uses = [CC] in {
634 let isCodeGenOnly = 1 in
1042 let isCodeGenOnly = 1 in
H A DSystemZInstrFP.td58 let isCodeGenOnly = 1 in {
68 let isCodeGenOnly = 1 in

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