| /minix3/external/bsd/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 4336 Op1 = DAG.getVectorShuffle(VT, dl, Op1, UndefNode, ShiftRightMask); in Compact8x32ShuffleNode() 4340 Op0 = DAG.getVectorShuffle(VT, dl, Op0, UndefNode, ShiftLeftMask); in Compact8x32ShuffleNode() 4343 return DAG.getVectorShuffle(VT, dl, Op0, Op1, BlendMask); in Compact8x32ShuffleNode() 5234 return DAG.getVectorShuffle(VT, dl, V1, V2, &Mask[0]); in getMOVL() 5246 return DAG.getVectorShuffle(VT, dl, V1, V2, &Mask[0]); in getUnpackl() 5258 return DAG.getVectorShuffle(VT, dl, V1, V2, &Mask[0]); in getUnpackh() 5290 V = DAG.getVectorShuffle(MVT::v4f32, dl, V, DAG.getUNDEF(MVT::v4f32), in getLegalSplat() 5300 V = DAG.getVectorShuffle(MVT::v8f32, dl, V, DAG.getUNDEF(MVT::v8f32), in getLegalSplat() 5363 return DAG.getVectorShuffle(VT, SDLoc(V2), V1, V2, &MaskVec[0]); in getShuffleVectorZeroOrUndef() 5882 return DAG.getVectorShuffle(VT, SDLoc(V1), V1, VZero, &Mask[0]); in LowerBuildVectorv4x32() [all …]
|
| /minix3/external/bsd/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeVectorOps.cpp | 795 DAG.getVectorShuffle(SrcVT, DL, Src, DAG.getUNDEF(SrcVT), ShuffleMask)); in ExpandANY_EXTEND_VECTOR_INREG() 849 DAG.getVectorShuffle(SrcVT, DL, Zero, Src, ShuffleMask)); in ExpandZERO_EXTEND_VECTOR_INREG() 870 Op = DAG.getVectorShuffle(ByteVT, DL, Op, DAG.getUNDEF(ByteVT), in ExpandBSWAP()
|
| H A D | LegalizeDAG.cpp | 218 return DAG.getVectorShuffle(NVT, dl, N1, N2, &Mask[0]); in ShuffleWithNarrowerEltType() 232 return DAG.getVectorShuffle(NVT, dl, N1, N2, &NewMask[0]); in ShuffleWithNarrowerEltType() 631 return DAG.getVectorShuffle(Vec.getValueType(), dl, Vec, ScVec, in ExpandINSERT_VECTOR_ELT() 1876 Shuffle = DAG.getVectorShuffle(VT, dl, IntermedVals[i].first, in ExpandBVWithShuffles() 1909 Res = DAG.getVectorShuffle(VT, dl, Vec1, Vec2, ShuffleVec.data()); in ExpandBVWithShuffles() 2016 return DAG.getVectorShuffle(VT, dl, Vec1, Vec2, ShuffleVec.data()); in ExpandBUILD_VECTOR()
|
| H A D | DAGCombiner.cpp | 2630 return DAG.getVectorShuffle(VT, SDLoc(N), NewNode, ShOp, in SimplifyBinOpWithSameOpcodeHands() 2651 return DAG.getVectorShuffle(VT, SDLoc(N), ShOp, NewNode, in SimplifyBinOpWithSameOpcodeHands() 3398 return DAG.getVectorShuffle(VT, SDLoc(N), N0->getOperand(0), in visitOR() 3401 return DAG.getVectorShuffle(VT, SDLoc(N), N1->getOperand(0), in visitOR() 11078 return DAG.getVectorShuffle(VT, dl, Ops[0], Ops[1], &Mask[0]); in visitBUILD_VECTOR() 11347 return DAG.getVectorShuffle(VT, SDLoc(SVN), S0, S1, SVN->getMask()); in simplifyShuffleOperands() 11424 return DAG.getVectorShuffle(VT, SDLoc(N), N0, DAG.getUNDEF(VT), in visitVECTOR_SHUFFLE() 11441 return DAG.getVectorShuffle(VT, SDLoc(N), N1, DAG.getUNDEF(VT), in visitVECTOR_SHUFFLE() 11458 return DAG.getVectorShuffle(VT, SDLoc(N), N0, N1, &NewMask[0]); in visitVECTOR_SHUFFLE() 11650 return DAG.getVectorShuffle(VT, SDLoc(N), SV0, SV1, &Mask[0]); in visitVECTOR_SHUFFLE() [all …]
|
| H A D | LegalizeVectorTypes.cpp | 1254 Output = DAG.getVectorShuffle(NewVT, dl, Op0, Op1, &Ops[0]); in SplitVecRes_VECTOR_SHUFFLE() 2237 return DAG.getVectorShuffle(WidenVT, dl, in WidenVecRes_CONCAT_VECTORS() 2541 return DAG.getVectorShuffle(WidenVT, dl, InOp1, InOp2, &NewMask[0]); in WidenVecRes_VECTOR_SHUFFLE()
|
| H A D | SelectionDAGBuilder.cpp | 3133 setValue(&I, DAG.getVectorShuffle(VT, getCurSDLoc(), Src1, Src2, in visitShuffleVector() 3187 setValue(&I, DAG.getVectorShuffle(VT, getCurSDLoc(), Src1, Src2, in visitShuffleVector() 3265 setValue(&I, DAG.getVectorShuffle(VT, getCurSDLoc(), Src1, Src2, in visitShuffleVector()
|
| H A D | SelectionDAG.cpp | 1458 SDValue SelectionDAG::getVectorShuffle(EVT VT, SDLoc dl, SDValue N1, in getVectorShuffle() function in SelectionDAG 1598 return getVectorShuffle(VT, SDLoc(&SV), Op1, Op0, &MaskVec[0]); in getCommutedVectorShuffle()
|
| H A D | LegalizeIntegerTypes.cpp | 3030 return DAG.getVectorShuffle(OutVT, dl, V0, V1, &NewMask[0]); in PromoteIntRes_VECTOR_SHUFFLE()
|
| /minix3/external/bsd/llvm/dist/llvm/include/llvm/CodeGen/ |
| H A D | SelectionDAG.h | 568 SDValue getVectorShuffle(EVT VT, SDLoc dl, SDValue N1, SDValue N2, 570 SDValue getVectorShuffle(EVT VT, SDLoc dl, SDValue N1, SDValue N2, 574 return getVectorShuffle(VT, dl, N1, N2, MaskElts.data());
|
| /minix3/external/bsd/llvm/dist/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 6020 SDValue T = DAG.getVectorShuffle(MVT::v16i8, dl, LHS, RHS, Ops); in BuildVSLDOI() 6276 SDValue T = DAG.getVectorShuffle(MVT::v16i8, dl, OpLHS, OpRHS, ShufIdxs); in GeneratePerfectShuffle() 6638 return DAG.getVectorShuffle(MVT::v16i8, dl, OddParts, EvenParts, Ops); in LowerMUL() 6640 return DAG.getVectorShuffle(MVT::v16i8, dl, EvenParts, OddParts, Ops); in LowerMUL()
|
| /minix3/external/bsd/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 5455 return DAG.getVectorShuffle(VT, dl, ShuffleSrcs[0], ShuffleSrcs[1], in ReconstructShuffle() 8883 return DAG.getVectorShuffle(VT, SDLoc(N), NewConcat, in PerformVECTOR_SHUFFLECombine() 9177 SDValue Shuff = DAG.getVectorShuffle(WideVecVT, DL, WideVec, in PerformSTORECombine()
|
| /minix3/external/bsd/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 4676 SDValue Shuffle = DAG.getVectorShuffle(ShuffleVT, dl, ShuffleOps[0], in ReconstructShuffle() 8493 SDValue Mask = DAG.getVectorShuffle(CCVT, DL, SetCC, SetCC, DUPMask.data()); in performSelectCombine()
|