Home
last modified time | relevance | path

Searched refs:getRegisterType (Results 1 – 8 of 8) sorted by relevance

/minix3/external/bsd/llvm/dist/llvm/include/llvm/Target/
H A DTargetLowering.h719 MVT getRegisterType(MVT VT) const { in getRegisterType() function
725 MVT getRegisterType(LLVMContext &Context, EVT VT) const { in getRegisterType() function
740 return getRegisterType(Context, getTypeToTransformTo(Context, VT)); in getRegisterType()
767 unsigned RegWidth = getRegisterType(Context, VT).getSizeInBits(); in getNumRegisters()
2496 EVT MinVT = getRegisterType(Context, MVT::i32); in getTypeForExtArgOrReturn()
/minix3/external/bsd/llvm/dist/llvm/lib/CodeGen/
H A DTargetLoweringBase.cpp935 MVT DestVT = TLI->getRegisterType(NewVT); in getVectorTypeBreakdownMVT()
1299 MVT DestVT = getRegisterType(Context, NewVT); in getVectorTypeBreakdown()
1341 MVT MinVT = TLI.getRegisterType(ReturnType->getContext(), MVT::i32); in GetReturnInfo()
1347 MVT PartVT = TLI.getRegisterType(ReturnType->getContext(), VT); in GetReturnInfo()
/minix3/external/bsd/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
H A DFunctionLoweringInfo.cpp302 MVT RegisterVT = TLI->getRegisterType(Ty->getContext(), ValueVT); in CreateRegs()
H A DSelectionDAGBuilder.cpp625 MVT RegisterVT = tli.getRegisterType(Context, ValueVT); in RegsForValue()
1264 MVT PartVT = TLI.getRegisterType(Context, VT); in visitRet()
7359 MVT RegisterVT = getRegisterType(CLI.RetTy->getContext(), VT); in LowerCallTo()
7439 MVT PartVT = getRegisterType(CLI.RetTy->getContext(), VT); in LowerCallTo()
7553 MVT RegisterVT = getRegisterType(CLI.RetTy->getContext(), VT); in LowerCallTo()
7640 MVT RegisterVT = TLI->getRegisterType(*DAG.getContext(), ValueVTs[0]); in LowerArguments()
7707 MVT RegisterVT = TLI->getRegisterType(*CurDAG->getContext(), VT); in LowerArguments()
7754 MVT RegVT = TLI->getRegisterType(*CurDAG->getContext(), VT); in LowerArguments()
7792 MVT PartVT = TLI->getRegisterType(*CurDAG->getContext(), VT); in LowerArguments()
H A DLegalizeDAG.cpp320 TLI.getRegisterType(*DAG.getContext(), in ExpandUnalignedStore()
443 MVT RegVT = TLI.getRegisterType(*DAG.getContext(), intVT); in ExpandUnalignedLoad()
1096 EVT LoadVT = TLI.getRegisterType(SrcVT.getSimpleVT()); in LegalizeLoadOps()
H A DFastISel.cpp902 MVT RegisterVT = TLI.getRegisterType(CLI.RetTy->getContext(), VT); in lowerCallTo()
H A DLegalizeIntegerTypes.cpp765 MVT RegVT = TLI.getRegisterType(*DAG.getContext(), VT); in PromoteIntRes_VAARG()
/minix3/external/bsd/llvm/dist/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp2179 EVT MinVT = getRegisterType(Context, ReturnMVT); in getTypeForExtArgOrReturn()