| /minix3/external/bsd/llvm/dist/llvm/lib/MC/ |
| H A D | MCRegisterInfo.cpp | 18 unsigned MCRegisterInfo::getMatchingSuperReg(unsigned Reg, unsigned SubIdx, in getMatchingSuperReg() function in MCRegisterInfo
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| /minix3/external/bsd/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrInfo.cpp | 1549 unsigned DestRegX = TRI->getMatchingSuperReg(DestReg, AArch64::sub_32, in copyPhysReg() 1551 unsigned SrcRegX = TRI->getMatchingSuperReg(SrcReg, AArch64::sub_32, in copyPhysReg() 1574 unsigned DestRegX = TRI->getMatchingSuperReg(DestReg, AArch64::sub_32, in copyPhysReg() 1576 unsigned SrcRegX = TRI->getMatchingSuperReg(SrcReg, AArch64::sub_32, in copyPhysReg() 1698 DestReg = RI.getMatchingSuperReg(DestReg, AArch64::dsub, in copyPhysReg() 1700 SrcReg = RI.getMatchingSuperReg(SrcReg, AArch64::dsub, in copyPhysReg() 1715 DestReg = RI.getMatchingSuperReg(DestReg, AArch64::ssub, in copyPhysReg() 1717 SrcReg = RI.getMatchingSuperReg(SrcReg, AArch64::ssub, in copyPhysReg() 1732 DestReg = RI.getMatchingSuperReg(DestReg, AArch64::hsub, in copyPhysReg() 1734 SrcReg = RI.getMatchingSuperReg(SrcReg, AArch64::hsub, in copyPhysReg() [all …]
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| /minix3/external/bsd/llvm/dist/llvm/include/llvm/Target/ |
| H A D | TargetRegisterInfo.h | 466 unsigned getMatchingSuperReg(unsigned Reg, unsigned SubIdx, in getMatchingSuperReg() function 468 return MCRegisterInfo::getMatchingSuperReg(Reg, SubIdx, RC->MC); in getMatchingSuperReg()
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| /minix3/external/bsd/llvm/dist/llvm/lib/CodeGen/ |
| H A D | CalcSpillWeights.cpp | 71 return tri.getMatchingSuperReg(hreg, sub, rc); in copyHint()
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| H A D | TwoAddressInstructionPass.cpp | 1413 assert(TRI->getMatchingSuperReg(RegA, SubRegB, MRI->getRegClass(RegB)) in processTiedPairs()
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| H A D | RegisterCoalescer.cpp | 305 Dst = TRI.getMatchingSuperReg(Dst, SrcSub, MRI.getRegClass(Src)); in setRegisters()
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| /minix3/external/bsd/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | ARMFrameLowering.cpp | 1174 unsigned SupReg = TRI->getMatchingSuperReg(NextReg, ARM::dsub_0, in emitAlignedDPRCS2Spills() 1192 unsigned SupReg = TRI->getMatchingSuperReg(NextReg, ARM::dsub_0, in emitAlignedDPRCS2Spills() 1204 unsigned SupReg = TRI->getMatchingSuperReg(NextReg, ARM::dsub_0, in emitAlignedDPRCS2Spills() 1292 unsigned SupReg = TRI->getMatchingSuperReg(NextReg, ARM::dsub_0, in emitAlignedDPRCS2Restores() 1308 unsigned SupReg = TRI->getMatchingSuperReg(NextReg, ARM::dsub_0, in emitAlignedDPRCS2Restores() 1319 unsigned SupReg = TRI->getMatchingSuperReg(NextReg, ARM::dsub_0, in emitAlignedDPRCS2Restores()
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| H A D | A15SDOptimizer.cpp | 148 unsigned DReg = TRI->getMatchingSuperReg(SReg, ARM::ssub_1, in getDPRLaneFromSPR()
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| H A D | ARMBaseInstrInfo.cpp | 1291 unsigned DstRegD = TRI->getMatchingSuperReg(DstRegS, ARM::ssub_0, in expandPostRAPseudo() 1293 unsigned SrcRegD = TRI->getMatchingSuperReg(SrcRegS, ARM::ssub_0, in expandPostRAPseudo() 4153 unsigned DReg = TRI->getMatchingSuperReg(SReg, ARM::ssub_0, &ARM::DPRRegClass); in getCorrespondingDRegAndLane() 4160 DReg = TRI->getMatchingSuperReg(SReg, ARM::ssub_1, &ARM::DPRRegClass); in getCorrespondingDRegAndLane() 4464 unsigned DReg = TRI->getMatchingSuperReg(Reg, ARM::ssub_0, in getPartialRegUpdateClearance()
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| /minix3/external/bsd/llvm/dist/llvm/lib/Target/R600/ |
| H A D | R600ControlFlowFinalizer.cpp | 293 DstMI = TRI->getMatchingSuperReg(Reg, in isCompatibleWithClause() 302 SrcMI = TRI->getMatchingSuperReg(Reg, in isCompatibleWithClause()
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| H A D | SIISelLowering.cpp | 556 Reg = TRI->getMatchingSuperReg(Reg, AMDGPU::sub0, in LowerFormalArguments()
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| /minix3/external/bsd/llvm/dist/llvm/include/llvm/MC/ |
| H A D | MCRegisterInfo.h | 342 unsigned getMatchingSuperReg(unsigned Reg, unsigned SubIdx,
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| /minix3/external/bsd/llvm/dist/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.cpp | 707 TRI->getMatchingSuperReg(DestReg, PPC::sub_64, &PPC::VSRCRegClass); in copyPhysReg() 716 TRI->getMatchingSuperReg(DestReg, PPC::sub_128, &PPC::VSRCRegClass); in copyPhysReg() 725 TRI->getMatchingSuperReg(SrcReg, PPC::sub_64, &PPC::VSRCRegClass); in copyPhysReg() 734 TRI->getMatchingSuperReg(SrcReg, PPC::sub_128, &PPC::VSRCRegClass); in copyPhysReg()
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| H A D | PPCISelLowering.cpp | 9464 return std::make_pair(TRI->getMatchingSuperReg(R.first, in getRegForInlineAsmConstraint()
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| /minix3/external/bsd/llvm/dist/llvm/lib/Target/Hexagon/ |
| H A D | HexagonCopyToCombine.cpp | 527 TRI->getMatchingSuperReg(LoRegDef, Hexagon::subreg_loreg, in combine()
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| /minix3/external/bsd/llvm/dist/llvm/lib/Target/AArch64/InstPrinter/ |
| H A D | AArch64InstPrinter.cpp | 1184 Reg = MRI.getMatchingSuperReg(Reg, AArch64::dsub, &FPR128RC); in printVectorList()
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| /minix3/external/bsd/llvm/dist/llvm/lib/Target/ARM/InstPrinter/ |
| H A D | ARMInstPrinter.cpp | 283 NewReg = MCOperand::CreateReg(MRI.getMatchingSuperReg(Reg, ARM::gsub_0, in printInst()
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| /minix3/external/bsd/llvm/dist/llvm/lib/Target/ARM/AsmParser/ |
| H A D | ARMAsmParser.cpp | 3627 Reg = MRI->getMatchingSuperReg(Reg, ARM::dsub_0, in parseVectorList() 3632 Reg = MRI->getMatchingSuperReg(Reg, ARM::dsub_0, in parseVectorList() 3808 FirstReg = MRI->getMatchingSuperReg(FirstReg, ARM::dsub_0, RC); in parseVectorList() 3821 FirstReg = MRI->getMatchingSuperReg(FirstReg, ARM::dsub_0, RC); in parseVectorList() 5901 unsigned NewReg = MRI->getMatchingSuperReg(Reg1, ARM::gsub_0, in ParseInstruction() 5958 unsigned SuperReg = MRI->getMatchingSuperReg( in ParseInstruction()
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