| /minix3/external/bsd/llvm/dist/llvm/lib/Target/R600/ |
| H A D | SIInstrInfo.h | 51 MachineInstr *Inst, unsigned Opcode) const; 54 MachineInstr *Inst, unsigned Opcode) const; 117 unsigned commuteOpcode(unsigned Opcode) const; 135 bool isMov(unsigned Opcode) const override; 139 bool isSALU(uint16_t Opcode) const { in isSALU() argument 140 return get(Opcode).TSFlags & SIInstrFlags::SALU; in isSALU() 143 bool isVALU(uint16_t Opcode) const { in isVALU() argument 144 return get(Opcode).TSFlags & SIInstrFlags::VALU; in isVALU() 147 bool isSOP1(uint16_t Opcode) const { in isSOP1() argument 148 return get(Opcode).TSFlags & SIInstrFlags::SOP1; in isSOP1() [all …]
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| H A D | R600InstrInfo.h | 77 bool isALUInstr(unsigned Opcode) const; 78 bool hasInstrModifiers(unsigned Opcode) const; 79 bool isLDSInstr(unsigned Opcode) const; 80 bool isLDSNoRetInstr(unsigned Opcode) const; 81 bool isLDSRetInstr(unsigned Opcode) const; 87 bool isTransOnly(unsigned Opcode) const; 89 bool isVectorOnly(unsigned Opcode) const; 91 bool isExport(unsigned Opcode) const; 93 bool usesVertexCache(unsigned Opcode) const; 95 bool usesTextureCache(unsigned Opcode) const; [all …]
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| H A D | R600InstrInfo.cpp | 95 bool R600InstrInfo::isMov(unsigned Opcode) const { in isMov() 98 switch(Opcode) { in isMov() 110 bool R600InstrInfo::isPlaceHolderOpcode(unsigned Opcode) const { in isPlaceHolderOpcode() 111 switch (Opcode) { in isPlaceHolderOpcode() 118 bool R600InstrInfo::isReductionOp(unsigned Opcode) const { in isReductionOp() 122 bool R600InstrInfo::isCubeOp(unsigned Opcode) const { in isCubeOp() 123 switch(Opcode) { in isCubeOp() 133 bool R600InstrInfo::isALUInstr(unsigned Opcode) const { in isALUInstr() 134 unsigned TargetFlags = get(Opcode).TSFlags; in isALUInstr() 139 bool R600InstrInfo::hasInstrModifiers(unsigned Opcode) const { in hasInstrModifiers() [all …]
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| /minix3/external/bsd/llvm/dist/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelDAGToDAG.cpp | 686 unsigned Opcode; in SelectLoad() local 692 Opcode = NVPTX::LD_i8_avar; in SelectLoad() 695 Opcode = NVPTX::LD_i16_avar; in SelectLoad() 698 Opcode = NVPTX::LD_i32_avar; in SelectLoad() 701 Opcode = NVPTX::LD_i64_avar; in SelectLoad() 704 Opcode = NVPTX::LD_f32_avar; in SelectLoad() 707 Opcode = NVPTX::LD_f64_avar; in SelectLoad() 715 NVPTXLD = CurDAG->getMachineNode(Opcode, dl, TargetVT, MVT::Other, Ops); in SelectLoad() 721 Opcode = NVPTX::LD_i8_asi; in SelectLoad() 724 Opcode = NVPTX::LD_i16_asi; in SelectLoad() [all …]
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| H A D | NVPTXTargetTransformInfo.cpp | 69 unsigned Opcode, Type *Ty, OperandValueKind Opd1Info = OK_AnyValue, 89 unsigned Opcode, Type *Ty, OperandValueKind Opd1Info, in getArithmeticInstrCost() argument 95 int ISD = TLI->InstructionOpcodeToISD(Opcode); in getArithmeticInstrCost() 100 Opcode, Ty, Opd1Info, Opd2Info, Opd1PropInfo, Opd2PropInfo); in getArithmeticInstrCost() 113 Opcode, Ty, Opd1Info, Opd2Info, Opd1PropInfo, Opd2PropInfo); in getArithmeticInstrCost()
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| /minix3/external/bsd/llvm/dist/llvm/lib/DebugInfo/ |
| H A D | DWARFDebugFrame.cpp | 64 Instruction(uint8_t Opcode) in Instruction() 65 : Opcode(Opcode) in Instruction() 68 uint8_t Opcode; member 76 void addInstruction(uint8_t Opcode) { in addInstruction() argument 77 Instructions.push_back(Instruction(Opcode)); in addInstruction() 80 void addInstruction(uint8_t Opcode, uint64_t Operand1) { in addInstruction() argument 81 Instructions.push_back(Instruction(Opcode)); in addInstruction() 85 void addInstruction(uint8_t Opcode, uint64_t Operand1, uint64_t Operand2) { in addInstruction() argument 86 Instructions.push_back(Instruction(Opcode)); in addInstruction() 100 uint8_t Opcode = Data.getU8(Offset); in parseInstructions() local [all …]
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| /minix3/external/bsd/llvm/dist/llvm/lib/Target/PowerPC/ |
| H A D | PPCTargetTransformInfo.cpp | 78 unsigned getIntImmCost(unsigned Opcode, unsigned Idx, const APInt &Imm, 95 unsigned getArithmeticInstrCost(unsigned Opcode, Type *Ty, OperandValueKind, 100 unsigned getCastInstrCost(unsigned Opcode, Type *Dst, 102 unsigned getCmpSelInstrCost(unsigned Opcode, Type *ValTy, 104 unsigned getVectorInstrCost(unsigned Opcode, Type *Val, 106 unsigned getMemoryOpCost(unsigned Opcode, Type *Src, unsigned Alignment, 199 unsigned PPCTTI::getIntImmCost(unsigned Opcode, unsigned Idx, const APInt &Imm, in getIntImmCost() argument 202 return TargetTransformInfo::getIntImmCost(Opcode, Idx, Imm, Ty); in getIntImmCost() 213 switch (Opcode) { in getIntImmCost() 333 unsigned Opcode, Type *Ty, OperandValueKind Op1Info, in getArithmeticInstrCost() argument [all …]
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| /minix3/external/bsd/llvm/dist/llvm/lib/Target/ARM/MCTargetDesc/ |
| H A D | ARMUnwindOpAsm.h | 74 void EmitInt8(unsigned Opcode) { in EmitInt8() argument 75 Ops.push_back(Opcode & 0xff); in EmitInt8() 79 void EmitInt16(unsigned Opcode) { in EmitInt16() argument 80 Ops.push_back((Opcode >> 8) & 0xff); in EmitInt16() 81 Ops.push_back(Opcode & 0xff); in EmitInt16() 85 void EmitBytes(const uint8_t *Opcode, size_t Size) { in EmitBytes() argument 86 Ops.insert(Ops.end(), Opcode, Opcode + Size); in EmitBytes()
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| /minix3/external/bsd/llvm/dist/llvm/lib/Target/X86/Disassembler/ |
| H A D | X86Disassembler.cpp | 46 const char *llvm::X86Disassembler::GetInstrName(unsigned Opcode, in GetInstrName() argument 49 return MII->getName(Opcode); in GetInstrName() 323 uint32_t Opcode = mcInst.getOpcode(); in translateImmediate() local 330 if (Opcode != X86::BLENDPSrri && Opcode != X86::BLENDPDrri && in translateImmediate() 331 Opcode != X86::PBLENDWrri && Opcode != X86::MPSADBWrri && in translateImmediate() 332 Opcode != X86::DPPSrri && Opcode != X86::DPPDrri && in translateImmediate() 333 Opcode != X86::INSERTPSrr && Opcode != X86::VBLENDPSYrri && in translateImmediate() 334 Opcode != X86::VBLENDPSYrmi && Opcode != X86::VBLENDPDYrri && in translateImmediate() 335 Opcode != X86::VBLENDPDYrmi && Opcode != X86::VPBLENDWrri && in translateImmediate() 336 Opcode != X86::VMPSADBWrri && Opcode != X86::VDPPSYrri && in translateImmediate() [all …]
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| /minix3/external/bsd/llvm/dist/llvm/include/llvm/MC/ |
| H A D | MCInstrInfo.h | 48 const MCInstrDesc &get(unsigned Opcode) const { in get() argument 49 assert(Opcode < NumOpcodes && "Invalid opcode!"); in get() 50 return Desc[Opcode]; in get() 54 const char *getName(unsigned Opcode) const { in getName() argument 55 assert(Opcode < NumOpcodes && "Invalid opcode!"); in getName() 56 return &InstrNameData[InstrNameIndices[Opcode]]; in getName()
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| /minix3/external/bsd/llvm/dist/llvm/tools/llvm-readobj/ |
| H A D | ARMEHABIPrinter.h | 96 uint8_t Opcode = Opcodes[OI++ ^ 3]; in Decode_00xxxxxx() local 97 SW.startLine() << format("0x%02X ; vsp = vsp + %u\n", Opcode, in Decode_00xxxxxx() 98 ((Opcode & 0x3f) << 2) + 4); in Decode_00xxxxxx() 101 uint8_t Opcode = Opcodes[OI++ ^ 3]; in Decode_01xxxxxx() local 102 SW.startLine() << format("0x%02X ; vsp = vsp - %u\n", Opcode, in Decode_01xxxxxx() 103 ((Opcode & 0x3f) << 2) + 4); in Decode_01xxxxxx() 119 uint8_t Opcode = Opcodes[OI++ ^ 3]; in Decode_10011101() local 120 SW.startLine() << format("0x%02X ; reserved (ARM MOVrr)\n", Opcode); in Decode_10011101() 123 uint8_t Opcode = Opcodes[OI++ ^ 3]; in Decode_10011111() local 124 SW.startLine() << format("0x%02X ; reserved (WiMMX MOVrr)\n", Opcode); in Decode_10011111() [all …]
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| /minix3/external/bsd/llvm/dist/llvm/lib/CodeGen/ |
| H A D | BasicTargetTransformInfo.cpp | 106 unsigned getArithmeticInstrCost(unsigned Opcode, Type *Ty, OperandValueKind, 111 unsigned getCastInstrCost(unsigned Opcode, Type *Dst, 113 unsigned getCFInstrCost(unsigned Opcode) const override; 114 unsigned getCmpSelInstrCost(unsigned Opcode, Type *ValTy, 116 unsigned getVectorInstrCost(unsigned Opcode, Type *Val, 118 unsigned getMemoryOpCost(unsigned Opcode, Type *Src, unsigned Alignment, 124 unsigned getReductionCost(unsigned Opcode, Type *Ty, 291 unsigned BasicTTI::getArithmeticInstrCost(unsigned Opcode, Type *Ty, in getArithmeticInstrCost() argument 297 int ISD = TLI->InstructionOpcodeToISD(Opcode); in getArithmeticInstrCost() 326 unsigned Cost = TopTTI->getArithmeticInstrCost(Opcode, Ty->getScalarType()); in getArithmeticInstrCost() [all …]
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| /minix3/minix/drivers/power/acpi/parser/ |
| H A D | psutils.c | 99 UINT16 Opcode) in AcpiPsInitOp() argument 105 Op->Common.AmlOpcode = Opcode; in AcpiPsInitOp() 108 (AcpiPsGetOpcodeInfo (Opcode))->Name, in AcpiPsInitOp() 129 UINT16 Opcode) in AcpiPsAllocOp() argument 139 OpInfo = AcpiPsGetOpcodeInfo (Opcode); in AcpiPsAllocOp() 151 else if (Opcode == AML_INT_BYTELIST_OP) in AcpiPsAllocOp() 175 AcpiPsInitOp (Op, Opcode); in AcpiPsAllocOp()
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| H A D | psargs.c | 301 if (WalkState->Opcode == AML_UNLOAD_OP) in AcpiPsGetNextNamepath() 430 UINT16 Opcode; in AcpiPsGetNextSimpleArg() local 443 Opcode = AML_BYTE_OP; in AcpiPsGetNextSimpleArg() 452 Opcode = AML_WORD_OP; in AcpiPsGetNextSimpleArg() 461 Opcode = AML_DWORD_OP; in AcpiPsGetNextSimpleArg() 470 Opcode = AML_QWORD_OP; in AcpiPsGetNextSimpleArg() 479 Opcode = AML_STRING_OP; in AcpiPsGetNextSimpleArg() 505 AcpiPsInitOp (Arg, Opcode); in AcpiPsGetNextSimpleArg() 530 UINT16 Opcode; in AcpiPsGetNextField() local 552 Opcode = AML_INT_RESERVEDFIELD_OP; in AcpiPsGetNextField() [all …]
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| H A D | psopinfo.c | 76 UINT16 Opcode) in AcpiPsGetOpcodeInfo() argument 88 if (!(Opcode & 0xFF00)) in AcpiPsGetOpcodeInfo() 92 return (&AcpiGbl_AmlOpInfo [AcpiGbl_ShortOpIndex [(UINT8) Opcode]]); in AcpiPsGetOpcodeInfo() 95 if (((Opcode & 0xFF00) == AML_EXTENDED_OPCODE) && in AcpiPsGetOpcodeInfo() 96 (((UINT8) Opcode) <= MAX_EXTENDED_OPCODE)) in AcpiPsGetOpcodeInfo() 100 return (&AcpiGbl_AmlOpInfo [AcpiGbl_LongOpIndex [(UINT8) Opcode]]); in AcpiPsGetOpcodeInfo() 106 switch (Opcode) in AcpiPsGetOpcodeInfo() 152 "%s [%4.4X]\n", OpcodeName, Opcode)); in AcpiPsGetOpcodeInfo() 173 UINT16 Opcode) in AcpiPsGetOpcodeName() argument 180 Op = AcpiPsGetOpcodeInfo (Opcode); in AcpiPsGetOpcodeName()
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| H A D | psobject.c | 82 WalkState->Opcode = AcpiPsPeekOpcode (&(WalkState->ParserState)); in AcpiPsGetAmlOpcode() 90 WalkState->OpInfo = AcpiPsGetOpcodeInfo (WalkState->Opcode); in AcpiPsGetAmlOpcode() 100 WalkState->Opcode = AML_INT_NAMEPATH_OP; in AcpiPsGetAmlOpcode() 112 WalkState->Opcode, in AcpiPsGetAmlOpcode() 124 WalkState->Opcode, in AcpiPsGetAmlOpcode() 139 if (WalkState->Opcode > 0xFF) /* Can only happen if first byte is 0x5B */ in AcpiPsGetAmlOpcode() 150 WalkState->ParserState.Aml += AcpiPsGetOpcodeSize (WalkState->Opcode); in AcpiPsGetAmlOpcode() 190 UnnamedOp->Common.AmlOpcode = WalkState->Opcode; in AcpiPsBuildNamedOp() 315 WalkState->OpInfo = AcpiPsGetOpcodeInfo (WalkState->Opcode); in AcpiPsCreateOp() 316 Op = AcpiPsAllocOp (WalkState->Opcode); in AcpiPsCreateOp() [all …]
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| /minix3/minix/drivers/power/acpi/executer/ |
| H A D | exoparg2.c | 105 AcpiPsGetOpcodeName (WalkState->Opcode)); in AcpiExOpcode_2A_0T_0R() 110 switch (WalkState->Opcode) in AcpiExOpcode_2A_0T_0R() 147 WalkState->Opcode)); in AcpiExOpcode_2A_0T_0R() 179 AcpiPsGetOpcodeName (WalkState->Opcode)); in AcpiExOpcode_2A_2T_1R() 184 switch (WalkState->Opcode) in AcpiExOpcode_2A_2T_1R() 219 WalkState->Opcode)); in AcpiExOpcode_2A_2T_1R() 288 AcpiPsGetOpcodeName (WalkState->Opcode)); in AcpiExOpcode_2A_1T_1R() 304 ReturnDesc->Integer.Value = AcpiExDoMathOp (WalkState->Opcode, in AcpiExOpcode_2A_1T_1R() 310 switch (WalkState->Opcode) in AcpiExOpcode_2A_1T_1R() 475 WalkState->Opcode)); in AcpiExOpcode_2A_1T_1R() [all …]
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| H A D | exoparg1.c | 100 AcpiPsGetOpcodeName (WalkState->Opcode)); in AcpiExOpcode_0A_0T_1R() 105 switch (WalkState->Opcode) in AcpiExOpcode_0A_0T_1R() 122 WalkState->Opcode)); in AcpiExOpcode_0A_0T_1R() 169 AcpiPsGetOpcodeName (WalkState->Opcode)); in AcpiExOpcode_1A_0T_0R() 174 switch (WalkState->Opcode) in AcpiExOpcode_1A_0T_0R() 209 WalkState->Opcode)); in AcpiExOpcode_1A_0T_0R() 240 AcpiPsGetOpcodeName (WalkState->Opcode)); in AcpiExOpcode_1A_1T_0R() 245 switch (WalkState->Opcode) in AcpiExOpcode_1A_1T_0R() 255 WalkState->Opcode)); in AcpiExOpcode_1A_1T_0R() 295 AcpiPsGetOpcodeName (WalkState->Opcode)); in AcpiExOpcode_1A_1T_1R() [all …]
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| /minix3/external/bsd/llvm/dist/llvm/lib/Target/Mips/ |
| H A D | MipsDSPInstrFormats.td | 39 let Opcode = SPECIAL3_OPCODE.V; 52 let Opcode = SPECIAL3_OPCODE.V; 66 let Opcode = SPECIAL3_OPCODE.V; 80 let Opcode = SPECIAL3_OPCODE.V; 94 let Opcode = SPECIAL3_OPCODE.V; 108 let Opcode = SPECIAL3_OPCODE.V; 122 let Opcode = SPECIAL3_OPCODE.V; 136 let Opcode = SPECIAL3_OPCODE.V; 151 let Opcode = SPECIAL3_OPCODE.V; 166 let Opcode = SPECIAL3_OPCODE.V; [all …]
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| /minix3/external/bsd/llvm/dist/llvm/lib/Target/SystemZ/ |
| H A D | SystemZInstrInfo.cpp | 141 unsigned Opcode = getOpcodeForOffset(isHighReg(Reg) ? HighOpcode : LowOpcode, in expandRXYPseudo() local 143 MI->setDesc(get(Opcode)); in expandRXYPseudo() 167 unsigned Opcode; in emitGRX32Move() local 171 Opcode = SystemZ::RISBHH; in emitGRX32Move() 173 Opcode = SystemZ::RISBHL; in emitGRX32Move() 175 Opcode = SystemZ::RISBLH; in emitGRX32Move() 182 BuildMI(MBB, MBBI, DL, get(Opcode), DestReg) in emitGRX32Move() 426 static bool isShift(MachineInstr *MI, int Opcode, int64_t Imm) { in isShift() argument 427 return (MI->getOpcode() == Opcode && in isShift() 498 static unsigned getConditionalMove(unsigned Opcode) { in getConditionalMove() argument [all …]
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| /minix3/external/bsd/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | ARMLoadStoreOptimizer.cpp | 105 int Offset, unsigned Base, bool BaseKill, int Opcode, 118 int Opcode, 125 int Opcode, unsigned Size, 161 int Opcode = MI->getOpcode(); in getMemoryOpOffset() local 162 bool isAM3 = Opcode == ARM::LDRD || Opcode == ARM::STRD; in getMemoryOpOffset() 166 if (Opcode == ARM::t2LDRi12 || Opcode == ARM::t2LDRi8 || in getMemoryOpOffset() 167 Opcode == ARM::t2STRi12 || Opcode == ARM::t2STRi8 || in getMemoryOpOffset() 168 Opcode == ARM::t2LDRDi8 || Opcode == ARM::t2STRDi8 || in getMemoryOpOffset() 169 Opcode == ARM::LDRi12 || Opcode == ARM::STRi12) in getMemoryOpOffset() 173 if (Opcode == ARM::tLDRi || Opcode == ARM::tSTRi) in getMemoryOpOffset() [all …]
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| /minix3/external/bsd/llvm/dist/llvm/lib/Analysis/ |
| H A D | TargetTransformInfo.cpp | 43 unsigned TargetTransformInfo::getOperationCost(unsigned Opcode, Type *Ty, in getOperationCost() argument 45 return PrevTTI->getOperationCost(Opcode, Ty, OpTy); in getOperationCost() 187 unsigned Opcode, Type *Ty, OperandValueKind Op1Info, in getArithmeticInstrCost() argument 190 return PrevTTI->getArithmeticInstrCost(Opcode, Ty, Op1Info, Op2Info, in getArithmeticInstrCost() 199 unsigned TargetTransformInfo::getCastInstrCost(unsigned Opcode, Type *Dst, in getCastInstrCost() argument 201 return PrevTTI->getCastInstrCost(Opcode, Dst, Src); in getCastInstrCost() 204 unsigned TargetTransformInfo::getCFInstrCost(unsigned Opcode) const { in getCFInstrCost() 205 return PrevTTI->getCFInstrCost(Opcode); in getCFInstrCost() 208 unsigned TargetTransformInfo::getCmpSelInstrCost(unsigned Opcode, Type *ValTy, in getCmpSelInstrCost() argument 210 return PrevTTI->getCmpSelInstrCost(Opcode, ValTy, CondTy); in getCmpSelInstrCost() [all …]
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| /minix3/external/bsd/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | AArch64ExpandPseudoInsts.cpp | 569 unsigned Opcode = MI.getOpcode(); in expandMI() local 570 switch (Opcode) { in expandMI() 598 unsigned Opcode; in expandMI() local 602 case AArch64::ADDWrr: Opcode = AArch64::ADDWrs; break; in expandMI() 603 case AArch64::SUBWrr: Opcode = AArch64::SUBWrs; break; in expandMI() 604 case AArch64::ADDXrr: Opcode = AArch64::ADDXrs; break; in expandMI() 605 case AArch64::SUBXrr: Opcode = AArch64::SUBXrs; break; in expandMI() 606 case AArch64::ADDSWrr: Opcode = AArch64::ADDSWrs; break; in expandMI() 607 case AArch64::SUBSWrr: Opcode = AArch64::SUBSWrs; break; in expandMI() 608 case AArch64::ADDSXrr: Opcode = AArch64::ADDSXrs; break; in expandMI() [all …]
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| H A D | AArch64TargetTransformInfo.cpp | 78 unsigned getIntImmCost(unsigned Opcode, unsigned Idx, const APInt &Imm, 109 unsigned getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src) const 112 unsigned getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index) const 116 unsigned Opcode, Type *Ty, OperandValueKind Opd1Info = OK_AnyValue, 123 unsigned getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy) const 126 unsigned getMemoryOpCost(unsigned Opcode, Type *Src, unsigned Alignment, 190 unsigned AArch64TTI::getIntImmCost(unsigned Opcode, unsigned Idx, in getIntImmCost() argument 201 switch (Opcode) { in getIntImmCost() 303 unsigned AArch64TTI::getCastInstrCost(unsigned Opcode, Type *Dst, in getCastInstrCost() argument 305 int ISD = TLI->InstructionOpcodeToISD(Opcode); in getCastInstrCost() [all …]
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| /minix3/external/bsd/llvm/dist/llvm/include/llvm/Analysis/ |
| H A D | TargetTransformInfo.h | 108 virtual unsigned getOperationCost(unsigned Opcode, Type *Ty, 365 getArithmeticInstrCost(unsigned Opcode, Type *Ty, 379 virtual unsigned getCastInstrCost(unsigned Opcode, Type *Dst, 384 virtual unsigned getCFInstrCost(unsigned Opcode) const; 387 virtual unsigned getCmpSelInstrCost(unsigned Opcode, Type *ValTy, 392 virtual unsigned getVectorInstrCost(unsigned Opcode, Type *Val, 396 virtual unsigned getMemoryOpCost(unsigned Opcode, Type *Src, 413 virtual unsigned getReductionCost(unsigned Opcode, Type *Ty,
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