| /minix3/external/bsd/llvm/dist/llvm/lib/Target/Mips/MCTargetDesc/ |
| H A D | MipsNaClELFStreamer.cpp | 150 bool IsStore; in EmitInstruction() local
152 &IsStore); in EmitInstruction()
158 bool MaskAfter = IsSPFirstOperand && !IsStore; in EmitInstruction()
203 bool *IsStore) { in isBasePlusOffsetMemoryAccess() argument
204 if (IsStore) in isBasePlusOffsetMemoryAccess()
205 *IsStore = false; in isBasePlusOffsetMemoryAccess()
235 if (IsStore) in isBasePlusOffsetMemoryAccess()
236 *IsStore = true; in isBasePlusOffsetMemoryAccess()
243 if (IsStore) in isBasePlusOffsetMemoryAccess()
244 *IsStore = true; in isBasePlusOffsetMemoryAccess()
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| H A D | MipsMCNaCl.h | 21 bool *IsStore = nullptr);
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| /minix3/external/bsd/llvm/dist/llvm/lib/CodeGen/ |
| H A D | AtomicExpandPass.cpp | 45 bool IsStore, bool IsLoad);
93 bool IsStore, IsLoad; in runOnFunction() local
98 IsStore = false; in runOnFunction()
103 IsStore = true; in runOnFunction()
109 IsStore = IsLoad = true; in runOnFunction()
120 IsStore = IsLoad = true; in runOnFunction()
124 MadeChange |= bracketInstWithFences(I, FenceOrdering, IsStore, IsLoad); in runOnFunction()
149 bool IsStore, bool IsLoad) { in bracketInstWithFences() argument
154 Builder, Order, IsStore, IsLoad); in bracketInstWithFences()
158 Builder, Order, IsStore, IsLoad); in bracketInstWithFences()
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| /minix3/external/bsd/llvm/dist/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXInstrFormats.td | 37 bit IsStore = 0;
53 let TSFlags{6-6} = IsStore;
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| /minix3/external/bsd/llvm/dist/clang/lib/CodeGen/ |
| H A D | CGAtomic.cpp | 769 bool IsStore = E->getOp() == AtomicExpr::AO__c11_atomic_store || in EmitAtomicExpr() local
795 if (IsStore) in EmitAtomicExpr()
807 if (IsLoad || IsStore) in EmitAtomicExpr()
833 if (!IsStore) in EmitAtomicExpr()
837 if (!IsLoad && !IsStore) in EmitAtomicExpr()
854 if (!IsStore) { in EmitAtomicExpr()
872 if (!IsLoad && !IsStore) { in EmitAtomicExpr()
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| /minix3/external/bsd/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.h | 403 bool IsStore, bool IsLoad) const override;
405 bool IsStore, bool IsLoad) const override;
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| H A D | ARMLoadStoreOptimizer.cpp | 388 bool IsStore = in UpdateBaseRegUses() local
391 if (IsLoad || IsStore) { in UpdateBaseRegUses()
404 if (Offset >= 0 && !(IsStore && InstrSrcReg == Base)) in UpdateBaseRegUses()
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| H A D | ARMISelLowering.cpp | 11050 AtomicOrdering Ord, bool IsStore, in emitLeadingFence() argument
11063 if (!IsStore) in emitLeadingFence()
11078 AtomicOrdering Ord, bool IsStore, in emitTrailingFence() argument
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| /minix3/external/bsd/llvm/dist/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.h | 463 bool IsStore, bool IsLoad) const override;
465 bool IsStore, bool IsLoad) const override;
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| H A D | PPCISelLowering.cpp | 6798 AtomicOrdering Ord, bool IsStore, in emitLeadingFence() argument
6809 AtomicOrdering Ord, bool IsStore, in emitTrailingFence() argument
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| /minix3/external/bsd/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86MCInstLower.cpp | 349 bool IsStore = Inst.getOperand(0).isReg() && Inst.getOperand(1).isReg(); in SimplifyShortMoveForm() local
350 unsigned AddrBase = IsStore; in SimplifyShortMoveForm()
351 unsigned RegOp = IsStore ? 0 : 5; in SimplifyShortMoveForm()
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| /minix3/external/bsd/llvm/dist/llvm/include/llvm/Target/ |
| H A D | TargetLowering.h | 1035 bool IsStore, bool IsLoad) const { in emitLeadingFence() argument
1039 if (isAtLeastRelease(Ord) && IsStore) in emitLeadingFence()
1046 bool IsStore, bool IsLoad) const { in emitTrailingFence() argument
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| /minix3/external/bsd/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 8001 bool IsStore = false; in performNEONPostLDSTCombine() local
8016 NumVecs = 2; IsStore = true; break; in performNEONPostLDSTCombine()
8018 NumVecs = 3; IsStore = true; break; in performNEONPostLDSTCombine()
8020 NumVecs = 4; IsStore = true; break; in performNEONPostLDSTCombine()
8028 NumVecs = 2; IsStore = true; break; in performNEONPostLDSTCombine()
8030 NumVecs = 3; IsStore = true; break; in performNEONPostLDSTCombine()
8032 NumVecs = 4; IsStore = true; break; in performNEONPostLDSTCombine()
8046 NumVecs = 2; IsStore = true; IsLaneOp = true; break; in performNEONPostLDSTCombine()
8048 NumVecs = 3; IsStore = true; IsLaneOp = true; break; in performNEONPostLDSTCombine()
8050 NumVecs = 4; IsStore = true; IsLaneOp = true; break; in performNEONPostLDSTCombine()
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